
ECE 154: Intro. to Computer Architecture
Behrooz Parhami: 2007/06/19  Email: parhami@ece.ucsb.edu  Problems: webadmin@ece.ucsb.edu Other contact info at: Bottom of this page  Go up to: B. Parhami's course syllabi or his home page
On June 19, 2007, Professor Parhami's UCSB ECE website moved to a new location. For an uptodate version of this page, visit it at the new address: http://www.ece.ucsb.edu/~parhami/ece_154.htm Link to previous offerings of ECE 154Winter quarter 2007 offering of ECE 154This area is reserved for important course announcements: 2007/03/26: Course grades have been submitted to the Registrar. Final exam grades: Range [34, 84], Mean 60, Median 59, SD 11. Have a great spring break! 2007/03/07: A sample final exam and suggested problems from Chapter 2124 have been added to this page. The instructor and TAs will maintain their normal office hours during the finals week (3/1923). In addition, the following office hours have been added for Friday, 3/23  11:0012:00 (JK, ECI Lab), 2:003:00 (SC, ECI Lab), 5:006:00 (BP, 5155 HFH). 2007/03/03: Exam grades: [Min, Max], Mean, Median, SD  MT1: [49, 89], 68, 68, 10  MT2: [61, 99], 85, 87, 10. The seventh homework assignment has been posted below a few days ahead of schedule to give you more time for working on it, given the rush of endofquarter assignments, projects, and exams.
Calendar: Course lectures, homework assignments, and exams have been scheduled as follows. This schedule will be strictly observed. About half of the lectures have been marked as important or very important. These lectures cover key concepts that constitute the core of ECE 154.
Homework: General Requirements Deposit solutions in ECE 154 homework box (Room 3120 HFH) before 10 AM on due date. Late
homework will not be accepted, so plan to start work on your assignments early. Use a cover page that includes your name, course and assignment number for your solutions. Staple
the sheets and write your name on top of every sheet in case sheets are
separated. Although
some cooperation is permitted, direct copying will have severe consequences. Homework 1: Logic design and computer technology (ch. 13, due F 1/19/2007, 10:00 AM) Do the following problems from the textbook (20 points each): 1.7, 1.9d, 2.4a, 2.8a, 3.16 Grades: Range = [65, 100], Mean = 81, Median = 85, SD = 12 Homework 2: Computer performance (ch. 4, due F 1/26/2007, 10:00 AM) Do the following problems from the textbook: 4.6 (20 pts.), 4.7 (20 pts.), 4.9 (25 pts.), 4.17 (10 pts.), 4.20 (25 pts.) Grades: Range = [40, 100], Mean = 78, Median = 83, SD = 16 Homework 3: Instructions and assembly language (ch. 57, due F 2/2/2007, 10:00 AM) Do the following problems from the
textbook: 5.7 (10 pts.), 5.8 Grades: Range = [70, 100], Mean = 92, Median = 95, SD = 9 Homework 4: ISA variations and computer arithmetic (ch. 810, due F 2/9/2007, 10:00 AM) Do the following problems from the
textbook, plus problem 10.A (15 pts.), defined below: 8.9 (20 pts.), 8.10 Grades: Range = [70, 100], Mean = 92, Median = 95, SD = 9 Problem 10.A  Alternative carry networks: Consider the following KoggeStone carry network for an 8bit adder. By labeling its lines in a manner similar to Fig. 10.11, verify that the network does indeed produce the required carries. Then, compare the new network with the BrentKung network of Fig. 10.11 with respect to cost/complexity (carryoperator count) and latency (carryoperator levels). Challenge question (optional): Can you write general formulas for the complexity and latency of the new network with k inputs, assuming that k is a power of 2?
Homework 5: Data path design and control unit (ch. 1314, due F 2/23/2007, 10:00 AM) Do the following problems from the
textbook: 13.3 (25 pts.), 13.7 Grades: Range = [55, 100], Mean = 96, Median = 99, SD = 9 Homework 6: Pipelining and its limits (ch. 1516, due F 3/2/2007, 10:00 AM) Do the following problems from the textbook: 15.6e (20 pts.), 15.14b (10 pts.), 15.16 (15 pts.), 16.1 (15 pts.), 16.4 (20 pts.), 16.10ab (20 pts.) Grades: Range = [60, 100], Mean = 94, Median = 97, SD = 8 Homework 7: Memory system design (ch. 1720, due F 3/16/2007, 10:00 AM) Do the following problems from the textbook: 17.3 (20 pts.), 18.4 (15 pts.), 18.5ac (20 pts.), 19.7d (15 pts.), 20.1a (10 pts), 20.4 (20 pts) Grades: Range = [70, 100], Mean = 88, Median = 90, SD = 7 Suggested problems (ch. 2124, for practice only, not to be turned in) Do the following problems from the textbook: 21.8, 21.9 [Correction: Example 21.2 is intended], 22.1, 22.5, 22.9, 23.4, 24.2, 24.11 Sample Midterm Exam The following is meant to indicate the types and levels of problems in the midterm, rather than the coverage (which is outlined in the lecture schedule and below). This particular exam covered up to the end of Chapter 12 of the textbook and was 105 minutes long (our two midterms will be 85 minutes each). Table 6.2 of the text was appended to the end of the exam for reference in solving Problem 3. Problem 1 [15 points]. Defining concepts and terms  Define each of the following concepts/terms precisely and concisely within the space provided (about 1.5 inch per term) [3 points each]: Decoder; PCrelative addressing; Pseudoinstruction; Assembler directive; Directed rounding. Problem 2 [25 points]. Amdahl's law  Problem 4.16 in the text [part a, 15 points; part b, 10 points] Problem 3 [20 points] Machine instructions  Problem 7.3 in the text, parts d and g [10 points each] Problem 4 [20 points] Multifunction ALU  Consider the following multifunction ALU studied in class. Specify the control signal values that are needed for executing the following two instructions. [10 points each] [Fig. 10.19 of the text goes here] (a) sll. (b) slt. Problem 5 [20 points] Shiftadd binary hardware multiplier  In the following diagram of a radix2 hardware multiplier, explain: [Fig. 11.4 of the text goes here] (a) [6 points] Why the register holding the multiplier y can be merged with the one holding the doublewidth partial product z^{(j)}. (b) [6 points] The role of the multiplexer. (c) [8 points] How separate cycles or phases for loading the doublewidth partial product register and shifting it to the right can be avoided. Sample Final Exam The following is meant to indicate the types and levels of problems in the final, rather than the coverage (which is outlined in the lecture schedule and below). This particular exam covered up to the end of Chapter 24 of the textbook and was 150 minutes long. The single midterm had included up to the end of Chapter 12 in the textbook. Problem 1 [16 points]. Defining concepts and terms  Define each of the following concepts/terms precisely and concisely within the space provided (about 1 inch per term) [2 points each]: Bus arbitration; Conflict miss; Delayed branch; Interrupt handler; Pseudoinstruction; Setassociative cache; TLB. Problem 2 [15 points] Computer arithmetic  Problem 11.10a in the text. Problem 3 [12 points] Processor data path  Problem 13.2b in the text. Problem 4 [16 points] Control unit design  The following diagram shows a microprogrammed implementation of control unit functions [Fig. 14.7 of the text goes here]. (a) Does this diagram represent a singlecycle or multicycle implementation? Why? (b) What are the roles of the dispatch ROMs? (c) How are the values of the "Sequence control" signals, that control the 4input mux, decided? (d) Name and describe two of the control signals that go from the microinstruction register to the data path section (choose any two and describe their functions briefly). Problem 5 [15 points] Pipelining  In the following diagram, a pipelined data path for MicroMIPS and some of its controls are shown [Fig. 15.10 of the text goes here]. Explain the roles of: (a) The control signals that are stored in the bottom part of the pipeline registers. (b) The multiplexer that appears below the SE circle, next to the register file. (c) The multiplexer located above the program counter. Problem 6 [16 points] Memory hierarchy  Example 20.3 in the text. Problem 7 [10 points] Input/Output  Example 22.5 in the text. Midterm and Final Exam Preparation The following includes topics that will be emphasized, as well as list of exclusions from the midterm exams (Chapters 410 for midterm 1, Chapters 1316 for midterm 2) and final exam (Chapters 424). All sections not specifically excluded are required, even if they are not covered in class. Chapters 13  No direct problem or question, but you need to know (and be able to define) concepts such as tristate buffers, multiplexers, register files, and so on, used to explain the topics that follow. Chapter 4  Computer performance: problem likely on CPI calculation, performance enhancement (Amdahl's law), instruction mix, and/or benchmarks. Chapters 58  Instructionset architecture: You do not need to memorize instruction codes or formats. Any problem in this area will be accompanied by a reference table providing a list of codes and formats if required. Ignore Sections 7.5, 7.6, and 8.4. Chapters 910  Computer arithmetic: problem likely on 2'scomplement numbers, number radix conversion, floatingpoint number formats, shift/logical operations (including distinction between arithmetic and logical shifts), adders and ALUs. Chapters 1314  Data path and control: problem very likely on control unit structure, control signal generation, multicycle instruction execution, and control state machine. Section 14.5 is excluded. Chapter 1516  Pipelining: problem very likely on pipeline bubbles (how to insert or avoid them), pipeline control, data hazards, data forwarding, control hazards, delayed branch, and/or branch prediction. The following apply to the final exam, which will include material from the preceding chapters as well, but to a lesser degree. Chapters 1720  Memory hierarchy: problem very likely on the need for memory hierarchy, cache memory concepts (levels 1 and 2), miss/hit rate, average memory access time, compulsory/capacity/conflict misses, mapping schemes, virtual memory, page table, and/or TLB. Sections 17.5, 19.5, and 19.6 are excluded. Chapters 2124  Input/output and interfacing: problem possible on memorymapped, polled, or interruptdriven I/O, buses, and interrupts. Sections 21.5, 21.6, 22.6, 23.5, 23.6, 24.5, and 24.6 are excluded. Chapters 2528  Advanced architectures: no problem or question. Return to: Top of this page  Go up to: B. Parhami's course syllabi or his home page

