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Current
Projects |
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This is both a device and
an IC design program: we seek to develop classical radio transmitter/receiver
ICs operating at 670, 820, and 1080 GHz. To do this we are (1) developing InP
heterojunction bipolar transistors at the 128 and 64 nm scaling generations,
targeting 1.2 and 2.0 THz fmax, and (2) designing full transmitter/receiver
front ends comprising LNA, PA, and PLL
for LO synthesis (VCO, frequency dividers and phase detectors). |
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We are developing medium-power amplifiers at 220 GHz for future applications in communications and imaging. We are also exploring monolithic phased array power amplifier designs at 220, 340, and 650 GHz, seeking to generate sufficient power for long-range high-performance imaging and communications systems at these frequencies. |
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In this center we seek to
develop MOSFETs with III-V compound semiconductor channels for potential
replacement of Si-channel devices in future VLSI systems at and beyond the 10
nm scaling generation. More details regarding this program can be found
at this link. |
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In this program we have
developed very linear 1-10 GHz broadband amplifiers with very high third
order intercepts yet low dc power consumption. The applications are in radar
and in wireless communication. The amplifiers use feedback techniques typical
of op-amps, but extend the loop bandwidths to 50 GHz or more. We are also developing
sample-holds with ~30-40 GHz sample rates, and are investigating other linear
high dynamic range GHz mixed-signal ICs. |
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The 3 fundamental limits to
transistor scaling for increased bandwidth are metal-semiconductor contact
resistance, thermal resistance, and (FETs only) gate dielectric capacitance
density. In this program we are exploring the formation of
ultra-low-resistance contacts through epitaxy |
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In this program we seek to develop
coherent optical receivers using electrical phase-locking of the optical LO.
We also seek to demonstrate optical
wavelength synthesis for wavelength / frequency control in WDM and LIDAR
systems using optical/electrical PLLs with electrical offset-locking in the
10-100 GHz range. |
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In this program we seek to
demonstrate high-capacity mm-wave radio communications links using massive
spatial parallelism. We are also exploring array techniques for adaptive
networking. |
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We are developing research
programs in ~7-10 nm transistors, emphasizing the role of semiconductor state
density and carrier group velocity in determining on-state drive current. |
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With >1 THz transistors
now demonstrated in InP, and 150 GHz amplifiers demonstrated even in CMOS
processes, highly directional and electronically steerable transmitters and
receivers are now the key missing requirement for deployment of practical
mm-wave (30-300 GHz) and sub-mm-wave (300-3000 GHz) radio systems. There are
key opportunities in developing such arrays at 220, 340 and 650 GHz in III-V
processes, and at 60 GHz and 70-90 GHz in CMOS processes. |
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