Forrest Brewer

• Curriculum Vitae
• Teaching Statement
• Research Statement

List of Publications for Evaluation

August 1, 2016

• (8) F. Brewer and D. Gajski, Chippe: A System for Constraint Driven Behavioral Synthesis, Technical Report 88-09, University of California, Irvine, April 2 and IEEE Trans. on Computer Aided Design of Circuits and Systems, pp. 681-695, 1988.


• (21) F. Brewer and A. Seawright, Clairvoyant: A Synthesis System for Production-Based Specification, IEEE Transactions on VLSI, vol. 2, no. 2, pp. 172-185, June 1994.


• (30) F. Brewer and I. Radivojevic, A New Symbolic Technique for Control-Dependent Scheduling, IEEE Transactions on CAD, vol.15, no.1, pp. 45-57, Jan. 1996.


• (31) F. Brewer and A. Stornetta, Implementation of an Efficient Parallel BDD Package, IEEE/ACM 33rd Design Automation Conference pp. 641-644, San Francisco, CA, June 1996.


• (33) F. Brewer, A. Vittal, H. Ha, and M. Marek-Sadowska, Clock Skew Optimization for Ground Bounce Control, Proc. ACM/IEEE, ICCAD-96, pp. 395-399, Nov. 1996.


• (35) F. Brewer and A. Crews Controller Optimization for Protocol Intensive Applications, Proc. Euro-DAC-96,Geneva, Switzerland, pp. 140-145, Sept. 1997.


• (43) S. Haynal, F. Brewer, Automata-Based Symbolic Scheduling for Looping DFG’s ,IEEE Trans. On Computers,Vol. 50, No. 3, pp. 250-267, March 2001.


• (45) S. Haynal, F. Brewer, Symbolic NFA Scheduling of a RISC Microprocessor, IEEE Tr. VLSI, Volume 10, Issue 4. pp. 429-434, Aug. 2002.


• (46) L.H. Chen, M. Marek-Sadowska, F. Brewer, Buffer Delay Change in the Presence of Power and Ground Noise, IEEE Trans. VLSI, Volume 11, Issue 3, pp.461-473, June 2003.


• (49) H. Shigematsu, T. Hirose, F. Brewer, and M. Rodwell Millimeter-Wave CMOS Circuit Design ,IEEE Trans. Microwave Theory and Techniques, vol. 53, no. 2, pp. 472-477, Feb. 2005.


• (60) G. Hoover, T. Sherwood and F. Brewer, Towards Understanding Architectural Tradeoffs in MEMS Closed-Loop Feedback Control, Proc. International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), pp. 95-102, Salzburg, Austria, Sept. 2007.


• (65) G. Hoover and F. Brewer, Synthesizing Synchronous Elastic Flow Networks, Proc. Design, Automation and Test in Europe (DATE), pp. 306-311, Munich, Germany, Oct. 2008.


• (79) Chatterjee, A.; Shrivastava, M.; Gossner,H.; Pendharkar, S.; Brewer, F.; Duvvury, C., An Insight Into the ESD Behavior of the Nanometer-Scale Drain-Extended NMOS Device—Part I: Turn-On Behavior of the Parasitic Bipolar, Electron Devices, IEEE Transactions on vol.58, no.2, pp. 309-317, Feb. 2011, doi: 10.1109/TED.2010.2093010.


• (85) Miller, Merritt; Brewer, Forrest, Formal Verification Of Analog Circuit Parameters Across Variation Utilizing SAT, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013, pp.1442-1447, 18-22 March doi: 10.7873/DATE.2013.294.


• (86) Wei Tang; Brewer, Forrest, Scalable High Quality Hierarchical Scheduling, ESLsyn2013, Austin TX. May, 2013.


• (93) Merritt Miller, Guido Maggazu, Forrest Brewer 5 Gbps Radiation-Hardened Low-Power Pulse Serial Link, IEEE Transactions on Nuclear Science 63(1), February 2016 DOI:10.1109/TNS.2015.2507551.