Kaustav Banerjee

Curriculum Vitae

List of Publications for Tenure Evaluation

August 11th, 2014

  1. Controllable and Rapid Synthesis of High-Quality and Large-Area Bernal Stacked Bilayer Graphene using Chemical Vapor Deposition, ACS Chemistry of Materials, Vol. 26, No. 2, pp 907-915, 2014.
  2. Computational Study of Metal Contacts to Monolayer Transition-Metal Dichalcogenide Semiconductors, Physical Review X, Vol. 4, No. 3, pp. 031005, 2014.
  3. Role of Metal Contacts in Designing High-Performance Monolayer n-Type WSe2 Field-Effect-Transistors, Nano Letters, Vol. 13, no. 5, pp. 1983-1990, 2013.
  4. Low-Resistivity Long-Length Horizontal Carbon Nanotube Bundles for Interconnect Applications—Part I: Process Development, IEEE Transactions on Electron Devices, Vol. 60, No. 9, pp. 2862-2869, 2013.
  5. Metal to Multi-Layer Graphene Contact—Part I: Contact Resistance Modeling, IEEE Transactions on Electron Devices, Vol. 59, No. 9, pp. 2444-2452, 2012.
  6. Proposal for Tunnel-Field-Effect-Transistor as Ultra-Sensitive and Label-Free Biosensors, Applied Physics Letters, Vol. 100, No. 14, 143108, 2012.
  7. Carbon Nanomaterials for Next-Generation Interconnects and Passives: Physics, Status, and Prospects, IEEE Transactions on Electron Devices, Vol. 56, No. 9, pp. 1799-1821, Sep 2009.
  8. Compact AC Modeling and Performance Analysis of Through-Silicon Vias (TSVs) in 3-D ICs, IEEE Transactions on Electron Devices, Vol. 57, No. 12, pp. 3405-3417, Dec. 2010.
  9. A Power-Optimal Repeater Insertion Methodology for Global Interconnects in Nanometer Designs, IEEE Transactions on Electron Devices, Vol. 49, No. 11, pp. 2001-2007, November 2002.
  10. 3-D ICs: A Novel Chip Design for Improving Deep-Submicrometer Interconnect Performance and Systems-on-Chip Integration, Proceedings of the IEEE, Vol. 89, No. 5, pp. 602-633, May 2001.