Welcome to the University of California-Santa Barbara VLSI CAD Research Group. We are a dynamic group of PhD students, working in different areas of Design Automation, with emphasis on Logic and Physical Synthesis. Our advisor is Professor Margaret Marek-Sadowska.

Our Research focus is on the following:

• FPGA  architecture design for High Throughput applications
  
• Layout driven Synthesis for High Throughput applications
  
• Signal Integrity Issues (Crosstalk and IR-drop)
  
• Post-Placement Logic Synthesis
  
• Performance Analysis and Optimization
  

Besides, we work on a variety of other VLSI CAD problems related to VLSI Testing, Finite State Machines and FPGA logic synthesis.

Feel free to check out our new and revamped web site !!