LECTURE NOTES AND REFERENCES


References:

 bullet  Cramming more Components onto Integrated Circuits, by Gordon E. Moore

 bullet S. Borkar, "Design Challenges of Technology Scaling," IEEE Micro, vol. 19, pp. 23-29, Jul-Aug 1999.

 bullet S. Lin, et. al.,"Analysis and Implications of IC Cooling for Deep Nanometer Scale CMOS Technologies," IEDM, 2005.

 
bullet K. Banerjee, A. Mehrotra,"A Power-Optimal Repeater Insertion Methodology for Global Interconnects in Nanometer Designs," IEEE TRANSACTIONS ON ELECTRON DEVICES, vol. 49, pp. 2001-2007, November 2002.

bulletHamed Dadgou, Rajiv V. Joshi, K. Banerjee,"A Novel Variation-Aware Low-Power Keeper Architecture for Wide Fan-in Dynamic Gates," DAC, 2006.

Lectures:

Lecture 1, September 27  2007

Lecture 2, October 2   2007

Lecture 3, October 4   2007

Lecture 4, October 9   2007

Lecture 5, October 11   2007

Lecture 6, October 16   2007

Lecture 7, October 18   2007

Lecture 8, October 23   2007

Lecture 9, October 25   2007

Lecture 10, October 30   2007

Lecture 11, November 1   2007

Lecture 12, November 6   2007

Lecture 13, November 13   2007

Lecture 14, November 15   2007

Lecture 15, November 20   2007

Lecture 16, November 27   2007

Lecture 17, November 29   2007

Lecture 18, December 4   2007

Lecture 19, December 6   2007



 

 

 

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