University of California,
Santa Barbara
Department of Electrical and Computer Engineering
Circuits and Electronics I
ECE 137A Winter 2009
Instructor: Prof. Luke Theogarajan
Schedule: Monday, Wednesday, and Friday, 9-9:50 a.m., Psychology 1924
ECE 137A strives to introduce basic concepts of design and analysis using active devices. It integrates the knowledge from ECE 2A,B & C to enable the design of ctive circuits such as amplifiers. The course is the first part of a two-part design sequence and involves a lab section. The course will cover the physics of diodes, MOSFETs & BJTs, circuits based on these devices; specific design topologies such as op-amps will also be discussed. We will briefly review various concepts of frequency-based analyses such as Fourier and Laplace methods, and the use ofBode-plots. Basic ideas behind feedback analysis and stability will also be discussed.
Required: Microelectronic Circuit Design (Third Edition), Jaeger & Blalock, McGraw-Hill, 200
Recommended: Microelectronic Circuits (Fifth Edition), Sedra & Smith, Oxford, 2008
ECE 2A, 2B, 2C Circuits and Electronics
ECE132 Semiconductor Device Physics
ECE130A
ECE137A is a prerequisite for ECE137B (of course)
If you have received a C- or below in any of these courses, or have a GPA below 2.0, you should arrange to see the instructor immediately
Do not go to the lab at the times posted in the Schedule of classes.
Design projects, not set experiments, will be assigned as the lab content of the course. The labs will be open, and you are free to work on your projects whenever the lab has open hours. The lab design projects are highly independent in nature, and your work should be creative, independent, original, and analytically rigorous. You will make a appointment at a specified time to check off the lab project in the presence of the TA. The lab is closed to further lab construction or project debugging during these times. The project must be working and available for check off at the time of the appointment; it is otherwise graded as late with associated penalties. Upon check-off, the circuit is handed in to the TA, and the TA in return provides a signed check-off sheet of recorded measurement values to each design team. This check off sheet is then included by the students as a part of the design report, due usually 1-3 days after the check off period.
Design teams are groups of two students. Larger groups are not permitted
There are no parts boxes in the lab. Parts for the lab can are obtained from the electronics shop on the 1st floor of engineering. Since they are not open evenings or weekends, reasonable advanced planning is required in terms of purchasing parts. Things you should purchase, one set-up per group of students: A tool and part box (Tackle box or Tupperware), Wire stripper and pliers , Solder less bread board, Soldering Iron (20-30 Watts), and solder, soldering heat sink clips, a small sponge (cleaning the iron tip), Vector board (perforated circuit board), a set of test leads for the digital voltmeter, 2 oscilloscope cables, and "flea clips"-insertable soldering terminals for vectorboard (optional, makes circuit construction easier and neater). While these items can be bought at Radio Shack or Dow/Marvak, the electronics shop on the 1st floor of engineering 1 will generally be much more
economical. For desoldering, plea"Solder sucker" desoldering tools are not permitted in the lab, as they disperse a toxic dust of solder granules over the lab.
Homework #1 Due 01-16 by 2 pm.
Homework sets will be due, at the times posted on the web, in the homework boxes in the center stairwell on the 5th floor of engineering 1. Late homework cannot be accepted as it interferes with the need to post solutions and return graded homework assignments quickly. Solutions will be posted on the class web page soon after the due date. Additionally to ensure adequate feedback of student performance we will use the ARIS web-based problem set assignment. Please read the following sheet to get started:
HW4 Solution (Additional Problems)
You are expected to work independently on both your problem sets and your lab projects. Significant sharing of design details on the lab projects is a violation of academic standards. Students are expected to keep their eyes on their own exams: students may expect to receive an exam grade of zero if they are observed to be looking at other student's examination papers.
Lab: 25%
Problem Sets: 10%
Web-based problems: 5%
Mid-term: 25%
Final: 35%
Exams are open book and open notes and a calculator will be required.
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Last Updated: January 6, 2009