Events

PhD Defense: "Physical Modeling and RLCG Extraction of Interconnects in 3-D ICs alongside Interconnect Technology Exploration with Carbon Nanomaterials"

Chuan Xu

June 1st (Friday), 2:00pm
Harold Frank Hall (HFH), Room 4164


As VLSI technologies evolve in More-Moore (smaller feature size via scaling) and More-than-Moore (more functionality via 3-D integration) eras and become increasingly communication centric, interconnects become central to improving the performance and energy-efficiency of circuits. This dissertation identifies and addresses some of the key technical problems of emerging interconnect structures and materials applicable to both 3-D integrated circuits (3-D ICs) as well as ultra-scaled planar ICs.

In the rapidly growing platform of 3-D ICs, we develop physical models and investigate the extraction of both the parallel admittance (capacitance (C) and conductance (G)) and the series impedance (resistance (R) and inductance (L)) of conventional and new interconnect structures, under a wide range of frequencies (few MHz to 100GHz). We derive both 2D (per-unit-length) analytical CG model and 3D CG extraction methodologies of Through-Silicon Vias (TSVs), with consideration of MOS effect and ac conduction in silicon. We then extend our work to investigate the CG coupling from TSVs to the active regions. We also formulate 2D and 3D analytical RL model for TSVs, with consideration of skin effect and substrate eddy current effect. All the models and extraction methods are verified against rigorous electromagnetic field solvers.

In the domain of carbon nanomaterials, electrical properties of carbon nanotubes (CNTs) and graphene nanoribbons (GNRs) are investigated. Using Landauer’s theory, a conductance model of multi-layer GNRs is derived for predictive analyses. We also extend our TSV RL model for the case of CNT bundles, in which we demonstrate a reduced skin effect. Subsequently, we study the circuit electrical performance of horizontal interconnects and TSVs with different interconnect materials (including Cu, W, CNT and GNR). From these comparative analyses, we illustrate the conditions necessary for making CNTs and GNRs viable alternatives to Cu or W.

About Chuan Xu:

Chuan Xu received both the B.S. degree in microelectronics and the M.S. degree in microelectronics and solid-state electronics from Peking University, Beijing, China, in 2004 and 2007, respectively. In 2007, he joined Prof. Banerjee’s Nanoelectronics Research Laboratory to work toward the Ph.D. degree in ECE. During the summer of 2008, he was an intern with the Electrical Interconnect and Packaging Group, IBM T.J. Watson Research Center, Yorktown Heights, NY. During the summers of 2009-2011, he was with the Calibre Division, Mentor Graphics Corporation, St. Ismier, France. During his master’s study, he worked on the fabrication and characterization of AlGaN/GaN heterostructure field-effect transistors. His current research interests include electromagnetic modeling and parasitic extraction of interconnects in 3-D ICs as well as various research topics in nanoelectronics. Mr. Xu’s doctoral research at UCSB has resulted in 25 papers in leading journals and refereed international conferences including four first-author papers in IEDM. He was the recipient of the “2008 IBM Problem Solving Award Based on the Use of the EIP Tool Suite,” which recognizes outstanding contributions by students in solving the most interesting problems using IBM’s Electromagnetic Field Solver Suite of Tools called the EIP tools.

Hosted by: Professor Kaustav Banerjee