Events

PhD Defense: "Development of CMOS Integrated Nanopore Detectors for Biomolecules"

Ashfaque Uddin

November 6th (Tuesday), 1:00pm
Harold Frank Hall (HFH), Rm 4164


One of the key bottlenecks to the widespread use of personalized medicine is the lack of a low-cost, portable and easy-to-use biomolecule detection platform. Recently, solid-state nanopore sensors have attracted significant interest because of their promise in realizing a fast and cheap electronic biosensor, especially for DNA sequencing. Realization of these sensors has faced several challenges, including overall sensitivity of the electronics, size, and cost. A solution to these challenges is the integration of the nanopore sensor and measurement electronics. An efficient integrated platform will reduce the parasitic capacitance of the system, thus enabling a wider bandwidth and a lower noise operation. Apart from greatly enhancing the sensitivity of the nanopore, the integration also drastically reduces the size and cost of the nanopore sensor. This dissertation explores the integration of solid-state nanopores within a Complementary Metal-Oxide Semiconductor (CMOS) platform, in close proximity to the biasing electrodes and custom-designed amplifier electronics.

First, we present the fabrication and characterization of solid-state nanopore devices in a commercial CMOS potentiostat chip implemented in On-Semiconductor 0.5 μm technology. Nanopore membranes incorporating electrodes are fabricated by post-CMOS micromachining utilizing the N+ polysilicon/SiO2/N+ polysilicon capacitor structure available in the aforementioned process. Nanopores are fabricated in the CMOS membranes by applying techniques such as transmission electron microscope drilling, focused ion beam drilling and atomic layer deposition. We also describe a method to mass-produce a large of number of electrode-embedded nanopores, with sub-10 nm diameters, across CMOS-compatible wafers by electron beam lithography. The CMOS-compatibility of our fabrication process is verified by testing the electrical functionality of on-chip circuitry. The integrity of both CMOS and CMOS-compatible nanopore devices is demonstrated by measuring the conductance, capacitance and noise characteristics. The functionality of these nanopores is also demonstrated through the detection of 48.5 kbp double-stranded λ-DNA in 1M KCl under an applied electric field.

Second, we propose a novel packaging technology called Versatile Chip-Specific Integration Technology (VCSIT) in order to realize a commercial fully-integrated CMOS nanopore sensor. If CMOS nanopore sensors are to be used in portable applications, they need to be integrated with a fluidic environment, via microfluidic channels, that enable the introduction of biomolecules to the on-chip sensor. The major bottleneck in microfluidic-CMOS integration is that the footprint of microfluidic systems generally exceeds the size of CMOS chips. In order to facilitate the fluidic integration, the chip area needs to be increased to match the size of microfluidic systems. To prevent the higher cost and lower yield that is associated with the increased CMOS chip area, we use the VCSIT process that enables a small foundry-fabricated die to be embedded in a large substrate and planarized. Electrical interconnects are then patterned to wire the CMOS die to large scale pads which can be easily connected to the outside world. A microfluidic channel is then integrated on the encapsulated chip by mechanical clamping or soft lithography techniques.

About Ashfaque Uddin:

photo of ashfaque uddin Ashfaque Uddin (aka Ash) received the B.Eng. (Hons.) degree in electronic and electrical engineering from the University of Leeds, U.K., in 2006 and the M.S. degree in electrical and computer engineering from the University of California Santa Barbara in 2009. Since 2008 he has been working toward the Ph.D. degree at the Biomimetic Circuits and Nanosystems Lab under the supervision of Professor Luke Theogarajan. His research interest includes the co-integration of nanopore detectors with CMOS electronics for biosensing applications. Ashfaque was the recipient of IEEE Best Paper Award in Advanced Packaging (2011) and IEEE Best Senior Year Project Prize in Telecommunications (2006).

Hosted by: Professor Luke Theogarajan