Events

PhD Defense: "Strategies to Improve the Thermoelectric Properties of Silicon Nanowires"

Benjamin Michael Curtin

February 13th (Thursday), 10:00am
Engineering Science Building (ESB), Room 1001

Thermoelectric materials enable conversion between thermal and electrical energy, with applications that include power generation, waste heat recovery, and solid-state cooling. Conventional thermoelectric devices, however, are both relatively inefficient and based on scarce materials such as tellurium. For high thermoelectric conversion efficiency and figure of merit ZT, materials must exhibit a high Seebeck coefficient (S), large electrical conductivity (σ), and low thermal conductivity (κ). While many of these properties are correlated, they can be independently controlled with nanostructures that selectively scatter phonons over electrons. This approach has led to remarkable advances with Si, an attractive material due to its abundance and scalability, where individual Si nanowires (NWs) were shown to have a 100× improvement in ZT over bulk Si from a reduction in κ. Despite this progress, greater values of ZT as well as devices that consist of many Si NWs are necessary for Si thermoelectrics to be a competitive energy technology.

As the Si NW κ approaches the theoretical limit for Si, further improvements in ZT must be made by increasing the thermoelectric power factor (S2σ). Electrically gated Si NWs are investigated since field-effect charge carriers have a greater mobility and σ than those contributed by dopants from the lack of ionized impurity scattering. A semi-classical transport model was used to calculate the thermoelectric properties of gate-all-around Si NWs for a range of geometries and gate biases. Mobility enhancement was found to increase power factor, with a 2 – 3× improvement over bulk Si expected for 6 nm × 6 nm Si NWs. Sub-40 nm trigated Si NWs were also fabricated on silicon-on-insulator substrates. Gate dependent thermoelectric properties were measured for gated Si NWs with different widths and compared to n-type Si thin-films. Both S and σ exhibited strong modulation with gate bias, which resulted in a maximum power factor that was greater than n-type Si.

Dense arrays of Si NWs are also required for efficient Si-based thermoelectric power generators and coolers. A novel process was developed to pattern and etch Si NWs from n-type bulk Si substrates, which were then embedded in a low-κ spin-on glass (SOG) matrix. The Si NWs had diameters < 100 nm, a height of 1 μm, and the Si NW array had a high packing density of 15 – 20%. Thin-film devices were also fabricated with the Si NW/SOG composite material for cross-plane thermoelectric measurements. The Si NW/SOG composite was found to have a comparable S and a 100× lower κ than bulk Si. Although the Si NW/SOG composite was relatively thin, ~30 μW of generated power was measured with a ΔT of 56 K. This is the first demonstration of high-density Si NW arrays for thermoelectric applications, and a large increase in both power generation and efficiency are expected with thicker films.

About Benjamin Michael Curtin:

Benjamin Curtin received his B.S. and M.S. degrees in Electrical Engineering from Iowa State University in 2008 and 2009, respectively. He is currently pursuing his Ph.D. degree at the University of California, Santa Barbara.

Hosted by: Professor John E. Bowers