Stefano Faralli, Research Engineer
The current trend in computing platforms is to integrate a large number of cores onto a single die, so that the computational performance can be improved by means of parallelization. The degree of integration is posing new challenges in designing the on-chip interconnection networks, or network-on-chip (NoC), required for core-to-core and core-to-cache communications. The NoC not only must provide high performance in terms of latency and bandwidth (BW), but also must be energy efficient and integrated on the same platform. The current issue with the conventional electronic NoC is that as the number of cores increases the size of the electrical connections, the power dissipation, and the BW are becoming a bottleneck for the performance of the computing systems .An optical multi microring network-on-chip (MMR NoC) is proposed, evaluated and designed. The network architecture consists of a central resonating microring with local microrings connected to the input/output ports. The talk will also review briefly the activity of the Integrated Photonics Group in Scuola Superiore Sant’Anna in Pisa, Italy
About Stefano Faralli:
Stefano Faralli was born in Siena, Italy, in 1971. He received the B.Sc. degree in physics from the University of Pisa, Pisa, Italy, in 2000, the M.Sc. degree in optical communications systems and networks from the Politecnico di Milano, Milan, Italy, in 2001, and the Ph.D. degree in telecommunications technology from Scuola Superiore Sant’Anna, Pisa, Italy, in 2006. He was visiting scholar at the University of California at Santa Barbara in 2011. He is currently a Research Engineer and his current research interests include silicon photonics, integrated optics, Raman amplifiers, erbium-doped fiber and waveguide amplifiers, and distributed optical fiber sensors.
Hosted by: Professor John Bowers