Lech Jóźwiak, Associate Professor, Department of Electronic Systems, Eindhoven University of Technology
Recent progress in nano-dimension semiconductor technology enabled implementation of a very complex multi-processor system on a single chip (MPSoC). This facilitated a rapid progress in mobile and autonomous computing, global networking and wire-less communication. Numerous new sorts of mobile and autonomous cyber-physical systems became technologically feasible and economically justified. Various systems performing monitoring, control, communication, visualization or combination of these tasks and being parts of different machines or devices, or even being wearable or implanted in human or animal body can serve as examples. However, many of the new cyber-physical applications are very complex and heterogeneous, while at the same time they require a guaranteed very high throughput or low reaction time, ultra-low energy consumption and adaptability. The combination of their high complexity with stringent and partly contradictive requirements results in several serious design challenges, such as: complex multi-objective MPSoC optimization, adequate resolution of numerous complex design tradeoffs, reduction of the design productivity gap, time-to market and development costs without compromising the system quality, etc. To overcome these challenges both the system and design methodology have to be adequately adapted. A system technology that effectively addresses the challenges is the heterogeneous MPSoC technology based on adaptable heterogeneous applicationspecific instruction-set processors (ASIPs) and HW accelerators. The presentation introduces an advanced industrial ASIP-based MPSoC technology of Intel Benelux, used a. o. in multiple newest generation smart-phones, tablets and cyber-physical products of many market leaders(e.g. Acer, Asus, Dell, HP, Lenovo,Casper, Etisalat, Motorola, Prestigio, Safaricom, Samsung, Toshiba, Xerox etc.). Subsequently, it discusses a new design methodology and design automation for the heterogeneous ASIP-based MPSoCs developed under leadership of the presenter by the combined industry and academia consortium of the European research project ASAM (Automatic Architecture Synthesis and Application Mapping for MPSoCs based on adaptable ASIPs) of the European industrial research program in embedded and cyber-physical systems ARTEMIS. After introducing a new ASAM design flow, the presentation focuses on the automatic architecture exploration of the multi-ASIP MPSoCs and ASIP-based HW/SW sub-systems.
About Lech Jóźwiak:
Lech Jóźwiak received his M. Sc. and Ph. D. degrees from the Faculty of Electronics, Warsaw University of Technology, Poland, in 1976 and 1982, correspondingly. From 1976 he has been continuously working in the area of his specialization in academia, research institutes or industry in Poland, The Netherlands, USA, Canada and Australia.Currently he is an Associate Professor, Head of the Section of Digital Circuits and Formal Design Methods, in the Department of Electronic Systems, Eindhoven University of Technology, The Netherlands. He is an author of the methodology of quality-driven system design, information-driven approach to digital circuit synthesis, and theories of information relationships and measures, and general decomposition of discrete relations that have both a theoretical value and considerable practical importance. He is also a creator of several practical products in the fields of embedded systems and EDA tools. He is an author of more than 180 journal and conference papers, some book chapters, and presenter of numerous keynotes and tutorials at international conferences and summer schools. He is an Editor in Chief of the journal of “Microprocessors and Microsystems”, Director of EUROMICRO, Founder and Steering Committee Chair of the EUROMICRO Conference on Digital System Design, Advisory Committee and Organizing Committee member of the IEEE International Symposium on Quality Electronic Design; and program committee member of many other conferences. He is or was an advisor and consultant to the industry, Ministry of Economy, and Commission of the European Communities. He was a recipient of multiple Letters and Diplomas of Recognition for highly esteemed services and exceptional achievements from a. o. the Minister of Economy of Poland, presidents of professional societies and organizations (e.g. IEEE, EUROMICRO, ISQED, etc.) and chief editors of international scientific journals (e.g. IEEE Transactions on Computers; IEEE Transactions on CAD, etc.). In 2008 he was a recipient of the Honorary Fellow Award of the International Society of Quality Electronic Design for “Outstanding Achievements and Contributions to Quality of Electronic Design”.
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