Events

PhD Defense: "III-As/N-Polar III-N Wafer-Bonded Heterojunctions and Their Implementation in Current Aperture Vertical Electron Transistors"

Jeonghee Kim

March 10th (Tuesday), 2:00pm
Elings Hall, Room 1601


Wafer-bonding is a novel technique which enables realizations of heterostructures consisting of heteroepitaxy-incompatible materials with a large lattice mismatch. Since its discovery, wafer-bonding has continued to expand its impact in diverse applications related to the field of semiconductors — from silicon-on-insulator wafers to hybrid III-V/Si photonics to many more. Likewise, if high-quality wafer-bonded heterostructures with unique combinations of materials can be successfully demonstrated, it is evident that their implementation in electronic devices will result in several breakthroughs.

Acknowledging the potential of wafer-bonding in expanding the design space in the field of electronics, a concept of wafer-bonded transistor consisting of a III-As channel (with superior carrier transport properties) and III-N drain (with very high breakdown voltage) has been developed with the aim of simultaneously achieving both the high-frequency and high-power performances within a single device. The transistor design selected for the wafer-bonded heterojunctions of III-As/III-N is the current aperture vertical electron transistor (CAVET), from which the regrown AlGaN/GaN channel with a two-dimensional electron gas is substituted with a wafer-bonded InGaAs channel.

In light of the notable advantages offered from the N-polar III-N materials in wafer-bonded CAVETs (or BAVETs), all BAVETs fabricated and analyzed throughout this dissertation are based on the N-polar III-N. In comparison to the past Ga-polar BAVETs, the first functional N-polar BAVET showed a markedly higher current, but it exhibited most of the same problems observed from the Ga-polar BAVETs, such as the anomalously high saturation voltage, finite turn-on voltage, and high gate leakage. By performing elaborated series studies on the doping in the gate heterobarrier, thickness of the added InGaN interlayer, and gate electrode geometry, the abovementioned problems seen in the BAVETs could be better understood and addressed. Finally, in the latest generation BAVET designed with all of the key observations taken into account, the turn-on voltage, which has been a persistent problem observed from the majority of the functional wafer-bonded transistors studied so far, was successfully eliminated, thus showing promise in expanding the use of wafer-bonding into the field of electronic devices.

This dissertation work aspired to demonstrate that — with continued research efforts invested in this field — the extra degree of freedom in the materials design offered by wafer-bonding may enable realizations of cutting edge electronic devices in the future, hence expanding the design space that is currently bound by heteroepitaxy.

About Jeonghee Kim:

photo of jeonghee kim Jeonghee Kim received her B.S. in Electrical Engineering with minor in Geological Sciences from UCSB in Spring 2009. She joined the GaN Electronics Lab in Fall 2009 and initiated her graduate research involving wafer-bonding for electrically active heterojunctions under supervision of Professor Umesh Mishra. She received her M.S. in Electrical and Computer Engineering from UCSB in Fall 2011 and is currently a PhD candidate in the Department of ECE. She will be joining the IBM Semiconductor Research & Development Center in East Fishkill, NY in April.

Hosted by: Professor Umesh Mishra