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The Association for Computing Machinery (ACM) interviews ECE Professor Yuan Xie in their November 2017 “People of ACM – Bulletin”

November 15th, 2017

photo of yuan xie
“People of ACM” highlights the unique scientific accomplishments and compelling personal attributes of ACM members who are making a difference in advancing computing as a science and a profession. These bulletins feature ACM members whose personal and professional stories are a source of inspiration for the larger computing community.

What research area(s) is receiving the most of your attention right now?
I am looking at application-driven and technology-driven novel circuits/architectures and design methodologies. My current research projects include novel architecture with emerging 3D integrated circuit (IC) and nonvolatile memory, interconnect architecture, and heterogeneous system architecture. In particular, my students and I have put a lot of effort into novel architectures for emerging workloads with an emphasis on artificial intelligence (AI). These novel architectures include computer architectures for deep learning neural networks, neuromorphic computing, and bio-inspired computing.

In your recent book Die-Stacking Architecture co-authored with Jishen Zhao, you predict that 3D memory stacking will be a computer architecture design that will become prevalent in the coming years. Will you tell us a little about 3D memory stacking?
Die-stacking technology is also called three-dimensional integrated circuits (3D ICs). The concept is to stack multiple layers of integrated circuits vertically, and connect them together with vertical interconnections called through-silicon vias (TSVs). My research group has been working on die-stacking architecture for more than a decade. We’ve been looking at different ways to innovate the processor architecture designs with this revolutionary technology. Recently, memory vendors have developed multi-layer 3D stacked DRAM products, such as Samsung’s High-bandwidth Memory (HBM) and Micron’s Hybrid-Memory Cube (HMC). Using interposer technologies, processors can be integrated with 3D stacked memory into the same package, increasing the in-package memory capacity dramatically. The first commercial die-stacking architecture is the AMD Fury X graphic processing unit (GPU) with 4GB HBM die-stacking memory, which was officially released in 2015. Since then, we have seen many other products that integrate 3D memory, such as Nvidia’s Volta GPU, Google’s TPU2, and, most recently, Intel and AMD’s partnership on Intel’s Kaby Lake G series, which integrates AMD’s Radeon GPU and 4GB HBM2.

More questions & answers and Xie’s ACM Bio

  • How might the introduction of radically new hardware impact the existing ecosystem of software?
  • What are the possible architectural innovations in the AI era?

The Association for Computing Machinery (ACM)

Xie's COE Profile

Xie's Scalable Energy-efficient Architecture Lab (SEAL)