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Oxide Based Compound-Semiconductor Electronics (Invited Paper)


Authors:  Umesh K. Mishra, Primit Parikh, Prashant Chavarkar, Jeff Yen, James Champlain, Brian Thiebeault*, Helen Reese, Song Stone Shi, Evelyn Hu, Lijie Zhou and James Speck
Department of Electrical & Computer Engineering and Materials Department
University of California, Santa Barbara, CA. 93106, *WiTech, 107, S. La Patera Lane, Goleta, CA. 93117

[Questions regarding this paper may be addressed to]:   primit@nemesis.ece.ucsb.edu


Background: The discovery of an oxide created by the wet thermal oxidation of AlGaAs with quality sufficient for optical mode and current confinement in lasers by Prof. Holonyak's group has created excitement in the general field of wet thermal oxidation of Al bearing compound semiconductors and more recently for possible electronic applications. As in the case of opto-electronic applications (most related to interface recombination velocity), the oxide for electronic applications needs to be of increasingly high quality, the closer it is placed to the device active area.

Need:

(i) Lateral Devices: The most important devices in this class are GaAs based MESFETs and HEMTs. The use of the oxide here is broadly for improving the efficiency of the FET by reducing ungated electron currents in unipolar devices by reducing gate and substrate leakage as shown in figure 1a and potentially providing for CMOS architectures as shown figure 1b.

(ii) Vertical devices: Here the oxides can be used to both tune the current by aperturing techniques where the area of the aperture is controlled by oxidation time as shown in figure 2a. This enables us design of novel device structures such as the CAVET (Current Apertured Vertical Electron Transistor, fig 2b). Also, parasitic capacitances can be reduced by replacing the high dielectric constant semiconductor by low dielectric constant oxides.

Implementation: The oxides are formed by etching mesas and oxidizing the exposed AlGaAs in steam at typically 450oC. GaAs based MOSFETs and GaAs on insulator devices based on this technique were fabricated and are shown in figures 3 and 4. The quality of the oxide and the interface is dependent on both effective removal of the Arsenic from the oxide and minimizing damage of the adjacent active layer. This is achieved by post-oxidation hydrogenation, gettering of the Arsenic during oxidation using Arsenic precipitated proximal low temperature grown buffer layers, and optimizing the oxidation temperature. The details will be presented at the conference. Current apertured Resonant Tunneling Diodes (RTDs) have also been demonstrated with Current Peak-to-Valley ratios tuned by oxidation time. This has the potential of improving RTD/FET based circuits by matching the RTD and FET currents after circuit fabrication. Application of oxides formed from alternate Aluminum containing compounds such as AlInP and AlAsSb (lattice matched to InP) will also be discussed.

Device and Materials Characterization: Our group has gained understanding of the oxide and the oxide-semiconductor interface through Hall, DLTS, C-V, TEM and photoluminescence measurements. This has been employed to produce FETs with improved transfer characteristics as shown in figure 5 with potential impact on linearity, efficiency and scaling. The potential of this technology and probability of acceptance into current technologies will be addressed.

                                                        
                                             

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