ADS is a powerful electronic design automation software system.. It offers complete design integration to designers of products such as cellular and portable phones, pagers, wireless networks, radar and satellite communications systems, and high-speed digital serial links.
ADS is available to all ECE and CE faculty, staff, and students. ADS is installed in the College of Engineering labs and available on the Windows and Linux workstations.
HFSS is an interactive software package for calculating the electromagnetic behavior of a structure. The software includes post-processing commands for analyzing this behavior in detail.
Using HFSS, you can compute:
Bluespec System Verilog (BSV) is aimed at hardware designers who are using or expect to use Verilog, VHDL, or System Verilog to design ASICs or FPGAs. BSV is based on a synthesizable subset of System Verilog, including System Verilog types, modules, module instantiation, interface instantiation, parameterization, static elaboration, and "generate" elaboration.
Cadence University Program Member
Cadence provides a set of electronic design automation (EDA) tools for electronics design.
Cadence tools are being used in academic research to design and layout SiGe Bipolar test circuits for 40 - 80 Gb/s data generation. The IBM SiGe 7HP process is the target process for this project. Interconnect group delay, clock and data distribution are being studied as well as the design of very high speed linear feedback shift registers and multiplexers. Cadence tools are also being used in millimeter-wave communication circuits and high-speed serial link transceivers in 130-nm and 90-nm CMOS technology. The UMC 0.13-um logic process and the IBM CMOS 10SF are the target process. Specifically, we are designing T/R switches, low-noise amplifiers, power amplifiers and high-speed equalizers.
The ECE department site license for Cadence includes the following 2011 standard University Software Program bundles:
Please see the Cadence 2013 University Program Software Selection for a list of the individual licensed products in the Software Program bundles.
Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134.
Mathematica is available for ECE faculty, staff, and graduate students. Student use is reserved to university labs that have the software installed on University-owned equipment. However students are not covered for the home-use license. The home-use license for our UCSB contract is only available for Faculty and staff.
Matlab is licensed for use and available to UCSB College of Engineering faculty, staff, graduate, and undergraduate students. Matlab is available on the engineering ECI lab Windows and Linux workstations. Matlab is available for installing on individual workstations for College of Engineering faculty, staff, and graduate students.
Please see How do I install Matlab?
Mentor Graphics provides a set of tools for system level design and verification, PCB design and analysis, ic design and verification, and embed ed software. Mentor Graphics tools are available on the Linux and Windows workstations in ECE and the Engineering labs.
Micro Magic, Inc. (MMI) provides design tools for high-performance and low power chips. The MMI tools are available on the Linux workstations in ECE and the Engineering labs. You can find the tools in /ece/mmi.
Directions for running the mmidoc and mmi_tutorial programs:
Select Microsoft products are available through ECE Information Technology Support. Primary among these are Microsoft Office (for faculty and administrative staff only), Windows XP Professional and Vista Business.
Silvaco provides high performance semiconductor process and device simulation (TCAD) tools. Silvaco is available on the Linux and Windows workstations in ECE and the Engineering labs.
UCSB has a volume license for Norton that is available for departments and individual faculty or staff for their work computers. The ECE department contributes to the campus Norton volume purchase and has made Norton available for the department. Norton is available for download at the Software Depot..
Synopsys provides ASIC, SoC design, FPGA, RTL design and electronic design automation tools and services. The Electrical and Computer Engineering department provides a license for a subset of the available Synopsys tools. Some of the most common are available on the ECI lab Windows, Linux, and Unix workstations. Contact ECE Computer Support at Contact firstname.lastname@example.org for questions about the tools. Some of the more common tools include; Synthesis, Hspice, powermill, pt, primetime, and a few other TCAD tools.
Synplicity® Inc. is the leading supplier of FPGA synthesis software and an innovator in synthesis, verification, and physical implementation software solutions for designers of programmable logic devices (FPGAs, PLDs, CPLDs).
The Synplicity tools are installed on the Windows workstations and the Linux workstations in the ECI E1 lab. You can find the Synplicity tools on the Linux workstations in /eci/synplicity.
The followings Synplicity tools are available:
The industry's most widely used FPGA synthesis solution, Synplify Pro uses a true timing-driven approach to synthesis. Synplify Pro software delivers the performance e neded to meet your design's timing requirements and then optimizes your circuit for area, saving significantly on chip cost.
Identify RTL Debugger is the first software tool that allows probing and debugging FPGA design directly in the source RTL. Identify software is used to verify your design in hardware as you would in simulation – only much faster and with in-system stimulus.
The Identify tool allows navigating design graphically and mark signals directly in RTL as probes or sample triggers. After synthesis, view the results in the RTL source code or in waveform. Design iterations are rapidly done using incremental place and route. Identify software is closely integrated with synthesis and routing tools for a seamless development environment.
The Synplify Premier solution builds upon Synplicity's industry-leading synthesis technology and adds new graph-based physical synthesis and real-time, simulator-like visibility into operating FPGA devices. Graph-based physical synthesis provides rapid timing closure and up to a 5-20% timing improvement.
Synplify DSP software is a true DSP synthesis tool and the only one that performs high-level DSP optimizations from a Simulink specification. These special DSP optimizations allow designers to capture the behavior needed for their DSP algorithm without worrying about the specific implementation in hardware. The Synplify DSP solution automatically produces a highly optimized, technology independent implementation of the design ready for RTL synthesis.
Certify ASIC prototyping solution is the leading product for ASIC prototyping using multiple FPGAs. Certify software combines RTL multi-chip partitioning with best-in-class FPGA synthesis. Using the Certify product makes ASIC prototyping significantly easier, shortens prototype development time, improves prototype performance, and enables faster time-to-market.
To setup a license environment to use the tools on a Linux workstation, type one of the following commands:
Synplicity tools are installed on the ECE and Engineering lab Linux workstations and available under /ece/synplicity. Contact email@example.com to find out if a specific Synplicity tool is available for download and installation on your workstation.
License, Documentation, and Tutorial Information