High-Resolution Quantitative Cathodoluminescence (CL) for Defect Metrology in Semiconductors

High spatial resolution spectroscopic information may be acquired by using an electron beam in a modern scanning electron microscope (SEM), exploiting a phenomenon called cathodoluminescence (CL). CL can be used to perform non-destructive analysis of a broad range of materials comprising insulators, semiconductors and metals. This approach offers several advantages over usual optical spectroscopy techniques. The multimode imaging capabilities of the SEM enable the correlation of optical properties (via CL) with surface morphology (secondary electron – SE – mode) at the nanometer scale. In semiconductors and insulators, the CL spectrum gives local information on the electronic bandgap and defect states. In metals and nanostructured materials, CL is sensitive to the local density of optical states (LDOS) and allows direct probing of nanophotonic devices. We will show how high resolution hyperspectral CL microscopy is routinely used to perform defect and homogeneity metrology as well as failure analysis in semiconducting materials. Examples on optoelectronic and solar cells devices will be highlighted. In addition, we will give examples of CL imaging of nanophotonic structures used as single photon sources, or for lasing and sensing applications. Finally, we will show how the introduction of pulsed electron excitation and time resolved detection of the CL signal (TRCL) allows carrier dynamic probing at the nanoscale.

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ECE Professor Umesh Mishra receives the 2017 Distinguished Educator Award from IEEE MTT-S

Photo of Umesh Mishra

Mishra receives the award for his work in high-efficiency electronics from the Institute of Electrical and Electronics Engineers Microwave Theory and Techniques Society (IEEE MTT-S)

IEEE is the world’s largest technical professional organization for the advancement of technology. The Distinguished Educator Award recognizes an educator in the field of microwave engineering and science who exemplifies the special human qualities of the late Fred J. Rosenbaum, who considered teaching a high calling and dedicated his life to serving MTT-S and the students who study it.

“It is an honor to receive an educator award, since teaching is our primary business,” Mishra said. “We do research not only for the sake of research, but also as a means to educate, otherwise, we’d only have professional engineers working in our labs. Research is a means to a good education, so while it is thrilling to be recognized for doing good research, I feel very honored, humbled, and happy to receive this teaching award. It also makes me think of the many people in our department who deserve this as much or more than I do.”

Over the past twenty years, Mishra has played a key role in collaborative research that has led to multiple breakthroughs in LEDs at UCSB’s Solid State Lighting & Energy Electronics Center, as well as in microwave and power electronics, often as part of projects funded by the Department of Defense, the Department of Energy, and the Office of Naval Research. He is currently focused on increasing the efficiency of electronics having applications in the booming electric-vehicle industry, microwave, RADAR and communications, and the emerging Internet of Things.

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ECE graduate student Arif Gungor receives 2nd place at UCSB’s Art of Science competition

Photo of Arif Gungor's Crack Range
Art of Science winners, including Gungor from ECE Professor Nadir Dagli’s group, share the beauty of science through imagery describing some aspect of their research. Competition sponsored by ECE Professor John Schuller’s lab and other groups.

Seeking to encourage researchers to express the joy of scientific discovery through aesthetics, UC Santa Barbara again held its Art of Science competition. About 1,400 members of the campus community voted in the fourth annual contest sponsored by ECE Professor Jon Schuller’s Lab, the Center for Science and Engineering Partnerships at the California NanoSystems Institute, the College of Creative Studies and the UCSB Library.

From the 56 entries, four winners and six honorable mentions were chosen. Graduate students took win, place and show. Nicole Leung and Tyler Ogunmowo of the Craig Montell Lab received first place for “Neuronas o árboles?” Arif Gungor, who works with Nadir Dagli, vice chair of the Department of Electrical and Computer Engineering, was awarded second place for “Crack Range.”

The Art of Science initiative recognizes the creative and experimental nature of science and challenges UCSB researchers to visually communicate the beauty inherent in scientific investigations. Participants in the competition use everything from photographs to spectroscopic images to data visualizations to reflect their discoveries.

All of the artwork will be exhibited at the UCSB Library beginning on July 28.

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U.S. News & World Report magazine ranks UCSB’s Electrical & Computer Engineering and College of Engineering among the “2018 Best Engineering Graduate Schools”

Photo of US News
ECE ranks #13 and the COE at #10 among public institutions

In addition to the current graduate program rankings, the magazine’s 2017 listing of the “Top 30 Public National Universities” places UCSB at No. 8. Among the “Best National Universities,” which includes both public and private institutions, UCSB came in at No. 37.

“I am pleased that UC Santa Barbara’s graduate programs have once again been recognized as among the best in the world,” said Carol Genetti, dean of UCSB’s Graduate Division. “The research conducted by our graduate students across disciplines in the sciences, social sciences and humanities is both inspirational and impactful.”

Noted Rod Alferness, dean of the university’s College of Engineering: “We’re delighted at these latest U.S. News rankings for the UCSB College of Engineering, and especially for our widely recognized Materials (#3 overall and #1 public) program. Rankings always include some level of subjectivity and can only tell part of the story, and I’m extremely pleased about the entire story of UCSB engineering, where strong faculty, highly motivated students, and unwavering support for cutting-edge research combine to ensure that breakthroughs occur in every department and our graduates become thriving professionals.”

The U.S. News rankings are based on a weighted average of various measures, some specific to the particular program. The rankings generally include an assessment by peers, with measures of faculty quality and resources, student selectivity, research activity and several other factors.

Highlights of the graduate school rankings are included in the current issue of U.S. News & World Report and in the 2018 edition of its America’s Best Graduate Schools as well as on the magazine’s website.

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Variation-Aware Mo deling and Design of Nanophotonic Interconnects

Optical interconnects have started to replace electrical interconnects in the communications between racks and circuit boards with potential benefits in bandwidth, delay, power efficiency, and crosstalk. Silicon photonics has emerged to be a highly promising enabling technology for the short-reach nanophotonic interconnects because it offers favorable CMOS compatibility and high integration level. The fast-growing complexity of photonic integrated circuit (PIC) and close electro-optical integration call for computer-aided design (CAD) for integrated photonics, and electro-optical design automation (EPDA) including accurate behavior models and efficient simulation methodologies for integrated electro-optical systems. Also, the nanophotonic devices are highly sensitive to fabrication process variation and thermal variation effects. To address these challenges, I will present two parts of efforts in my talk: (1) compact modeling and circuit-level simulation of nanophotonic interconnects, and (2) power-efficient management of the variation effects in nanophotonic interconnects.

We develop compact models for key components in nanophotonic interconnects including silicon microring modulators and other key components. These compact models are developed based on their electrical and optical properties and are then extensively validated by measurement data. The model parameters are extracted from common electrical and optical tests. Implemented in Verilog-A, the models are used in SPICE simulations of optical links. The compact model library and the simulation methodology enable electro-optical co-simulations and optical device design explorations in the circuit-level.

To address the variation challenges, we propose several modeling methods and power-efficient management schemes. The proposed adaptive tuning technique performs on-chip self-tests and adaptively allocates just enough power for link operations. The technique saves significant amount of power compared to worst-case based conservative designs, and scales well w.r.t. variations and network size. We also design power-efficient pairing algorithms for microring-based optical interconnects. Our algorithms optimally mix-and-match microring-based devices to minimize the power consumption for tuning. The algorithms are tested on both measured and synthetic data sets, demonstrating promising results of power reduction and scalability for handling a large number of devices. Lastly, we decompose and analyze wafer-scale spatial patterns of process variations in microring modulators, providing useful insights in understanding the process variation sources.

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Common-case Optimized Memory Design: An Approach to Build Energy-efficient Memory Architectures for Future Datacenters and HPC Systems

Due to the large amount of power that datacenters and HPC systems consume, energy-efficiency improvements are critical for sustainable performance scaling of these systems. Memories pose a looming power bottleneck for future data centers and HPCs due to both application-level and micro-architectural trends. For example, in high memory capacity servers systems, memory can occupy up to 40% of server power budget; similarly, for future exa-scale supercomputers, memory power has been projected to occupy 40-70% of the power budget per computing node. To tackle the memory power problem, I propose common-case optimized memory design, which reduces the energy overheads of common-case memory accesses (e.g., fault free accesses) at the expense of increasing the energy overheads for uncommon case accesses (e.g., accesses to faulty locations). Since common-case accesses are much more frequent than uncommon-case accesses, this tradeoff significantly reduces overall memory energy overheads. In the talk, I will describe common-case optimized memory architectures both for off-chip main memory and on-chip cache memories; the proposed common-case optimized off-chip main memory architecture improves memory energy efficiency by 30-50% while the proposed common-case optimized on-chip main memory architecture improves processor-core-wide energy efficiency by 16%.

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Enhancing QoS in Beamforming Networks: Mobile Beamformers and Optimal Motion Policies

Distributed, networked communication systems, such as relay beamforming networks are typically designed without considering how the positions of the respective nodes might affect the quality of the communication. That is, network nodes are either assumed to be stationary in space, or, if some of them are moving while communicating, their trajectories are assumed to be independent of the respective communication task. However, in most cases, the Channel State Information (CSI) observed by each network node, per channel use is both spatially and temporally correlated. One could then ask whether the performance of the communication system could be improved by predictively controlling the positions of the network nodes (e.g., the relays), based on causal CSI estimates and by exploiting the spatiotemporal dependencies of the communication medium. In this talk, we address the problem of enhancing Quality-of-Service (QoS) in power constrained, mobile relay beamforming networks, by optimally exploiting relay mobility. We consider a time slotted system, where the relays update their positions before the beginning of each time slot. Adopting a spatiotemporal stochastic field model of the wireless channel, we propose a novel 2-stage stochastic programming formulation for specifying the relay positions at each time slot, such that the QoS of the network is maximized on average, based on causal CSI and under a total relay transmit power budget. The motion control problem considered is shown to be approximately equivalent to a set of simple subproblems, which can be solved in a distributed fashion, one at each relay. Numerical simulations are presented, corroborating the efficacy of the proposed approach and confirming its properties.

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A Model for University Engineering Capstone Programs

Beginning in the Fall of 2009, the Electrical and Computer Engineering department at U.C. Santa Barbara has formally offered EE Senior Capstone Design (ECE 188) as a senior elective sequence. Participating students spend their senior year completing either an ECE-based project as part of a team of ECE students, or an interdisciplinary project as part of an interdisciplinary team made up of ECE and Mechanical Engineering students. Projects fall into several categories: (i) Research group projects, in which a research group at UCSB poses a design challenge; (ii) Industry partner projects, in which an industry partner specifies a design challenge of interest to their organization; (iii) Student defined projects; and (iv) Student competitions. This talk will focus on the development and expansion of the Electrical Engineering Capstone program at UCSB, including significant achievements and lessons learned that can serve to guide further expansion of the program. 

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ECE Prof. Larry Coldren’s recent research achievements published in OSA’s Optics Express and featured as a Research Highlight in Nature Photonics

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Coldren and his Optoelectronics Technology Center (OTC) as well as other research teams recognized for accomplishments related to “on-chip optical frequency synthesis”

Since the first demonstration in 2000, optical frequency synthesis using self-referenced optical combs have emerged worldwide for novel civilian and defense applications. Due to the large size, relative fragility, and high cost of these components and systems, however, precise optical frequency synthesis so far has been limited to lab-scale experiments. The paper in OSA’s Optics Express reports on the experimental demonstration of an agile chip-scale optical frequency synthesizer (OFS) achieved by phase-locking an on-chip widely tunable semiconductor lasers to spectrally pure optical frequency comb. New generations of optical frequency control technology could enable a wide range of applications in optical spectroscopy, gas sensing, LIDAR, portable atomic clocks, high-bandwidth and secure communications, and intrusion detection, among other areas.

The reported work is a major step towards demonstration of the true chip-scale optical frequency synthesizer with programmable <1 Hz frequency resolution, <1 cm3 volume, and <1 W electrical power consumption.  Such a system can be utilized in various microwave photonics applications, which will appeal to a broad audience both within the photonics community as well as outside.

OSA’s Optics Express is an all-electronic, open access journal for optics providing rapid publication for peer-reviewed articles that emphasize scientific and technology innovations in all aspects of optics and photonics. Nature Photonics is a peer-reviewed scientific journal published by the Nature Publishing Group. The journal covers research related to optoelectronics, laser science, and other aspects of photonics. Nature Photonics publishes review articles, research papers, News and Views pieces, and research highlights summarizing the latest scientific findings in optoelectronics.

Larry A. Coldren is the Fred Kavli Professor of Optoelectronics and Sensors at UCSB. After receiving his Ph.D. in EE from Stanford and 13 years at Bell Laboratories, he joined UCSB in 1984 where he holds appointments in the ECE and Materials and ECE. He has authored or co-authored over a thousand journal and conference papers, a number of book chapters, two textbooks, and has been issued 65 patents. He is a Fellow of the IEEE, OSA, and a recipient of the 2004 John Tyndall, 2009 Aron Kressel, and 2014 David Sarnoff Awards, as well as being a member of NAI and NAE.

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Cloud-based Architecture

Businesses and Academics are increasingly turning to Infrastructure as a Service (IaaS) Clouds to fulfill their computing needs. Unfortunately, current IaaS systems provide a severely restricted pallet of rentable computing options which do not optimally fit the workloads that they are executing. Yanqi’s research encompasses various aspects (Sharing Architecture [ASPLOS 2014], MITTS [ISCA 2016], CASH [ISCA 2016]) of computer architecture aimed at improving IaaS Cloud economic efficiency. The talk will focus on the design and evaluation of a manycore architecture (Sharing Architecture) and a memory bandwidth provisioning mechanism (MITTS). The Sharing Architecture is specifically optimized for IaaS systems by being reconfigurable on a sub-core basis. It enables better matching of workload to micro-architecture resources by replacing static cores with Virtual Cores which can be dynamically reconfigured to have different numbers of ALUs and amount of Cache. MITTS (Memory Inter-arrival Time Traffic Shaping) is a distributed hardware mechanism which limits memory traffic at the source (Core or LLC). MITTS shapes memory traffic based on memory request inter-arrival time using novel hardware, enabling fine-grain bandwidth allocation. In an IaaS system, MITTS enables Cloud customers to express their memory distribution needs and pay commensurately. In a general purpose multicore program, MITTS can be used to optimize for memory system throughput and fairness. MITTS has been implemented in the 32nm 25-core Princeton Piton Processor [HotChip 2016], as well as the open source OpenPiton [ASPLOS 2016] processor framework. The Sharing Architecture and MITTS provide fine-grain hardware configurability, which improves economic efficiency in IaaS Clouds.

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