Probabilistic Graphical Models for Contour Tracking and Segmentation in Electron Microscopy Images

Automatic 3D reconstruction of neuronal circuitry in biological images is key to discerning cellular ultra structure. This talk covers my research work on the problem of 3D reconstruction of neuronal cells in electron microscopy images, using probabilistic graphical models. First I will cover a 1D hidden Markov model-based contour tracking algorithm for a single or a few neuronal processes involving topological changes. In this method, uncertain segments with lower likelihoods are detected, and then a few hypothetical arcs are created to perform contour refinement to enable the discovery and corresponding tracing of topology changes. Secondly I will cover a method, wherein a two-dimensional hidden Markov model is utilized for tracing a large number of cells by modeling the problem as a pixel labeling task. This method leverages the concept of spatially adaptive states, wherein the state-space at each pixel is locally extracted to be a small subset of the full state-space. This local adaptation of states, not only reduces the computational complexity significantly, but also improves the segmentation accuracy. While the first contour tracking algorithm precisely locates cell boundaries, the second pixel-labeling-based algorithm easily scales to a large number of cells, and hence represent two complimentary techniques that together offer significant advancement on the problem of 3D reconstruction of neuronal cells.

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ECE graduate student Ping Chi awarded a silver medal at the Association for Computing Machinery (ACM) Student Research Competition (SRC)

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Ping Chi received the ACM SRC medal for her research project titled “Next-Generation Memory Design: Architecture-level and Application-level Perspectives.” She is advised by ECE Professor Yuan Xie.

The ACM SRC is sponsored by Microsoft Research and is an internationally recognized venue enabling undergraduate and graduate students who are ACM members to:

  • Experience the research world — for many undergraduates this is a first!
  • Share research results and exchange ideas with other students, judges, and conference attendees
  • Rub shoulders with academic and industry luminaries
  • Understand the practical applications of their research
  • Perfect their communication skills
  • Receive prizes and gain recognition from ACM and the greater computing community

The ACM Special Interest Group on Design Automation (ACM SIGDA) organized this event in conjunction with the International Conference on Computer Aided Design (ICCAD) held in San Jose from Nov. 3-6, 2014.

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ECE grad student Ping Chi and ECE Prof. Yuan Xie receive the IEEE/ACM William J. McCalla ICCAD Best Paper Award

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Ping Chi, a 4th-year ECE Ph.D. student and co-author ECE Professor Yuan Xie receive the 2014 IEEE/ACM William J. McCalla ICCAD Best Paper Award.

Chi received the front-end design award for her paper titled “Using Multi-Level Cell STT-RAM for Fast and Energy-Efficient Local Checkpointing,” at the 2014 International Conference on Computer-Aided Design (ICCAD) held in San Jose, from Nov. 3-6, 2014. The paper was co-authored with Dr. Cong Xu (Penn State), Dr. Tao Zhang (Nvidia), Dr. Xiangyu Dong (Google), and her advisor Dr. Yuan Xie (UCSB).

Given in memory of William J. McCalla for his contributions to ICCAD and his CAD technical work throughout his career. The awards are split into three sections, two for the current year of the ICCAD conference and one for an ICCAD paper from 10 years prior. For the current year awards, one will be given for the best research paper covering the front-end of the design process and one will be given for the back-end of the design process. For the ten-year retrospective most influential paper, the award is given to the paper judged to be the most influential on research and industry practice in computer-aided design of integrated circuits over the ten years since its original appearance at ICCAD. The awards are jointly sponsored by IEEE Council on Electronic Design Automation (IEEE CEDA) and the ACM Speci al Interest Group on Design Automation (ACM SIGDA). The awards are decided by ICCAD Best Paper and Most Influential Awards Selection Committees and were first given in 2000.

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Shannon-inspired Statistical Computing

Moore’s Law has been the driving force behind the exponential growth in the semiconductor industry for the past five decades years. Today, energy efficiency and reliability challenges in nanoscale CMOS (and beyond CMOS) processes threaten the continuation of Moore’s Law. This talk will describe our work on developing a Shannon-inspired statistical information processing that seeks to address this issue by treating the problem of computing on unreliable devices and circuits as one of information transfer over an unreliable/noisy channel. Such a paradigm seeks to transform computing from its von Neumann roots in data processing to Shannon-inspired information processing. Key elements of this paradigm are the use of statistical signal processing, machine learning principles, equalization and error-control, for designing error-resilient on-chip computation, communication, storage, and mixed-signal analog front-ends. The talk will provide a historical perspective and demonstrate examples of Shannon-inspired designs of on-chip subsystems. This talk will conclude with a brief overview of the Systems On Nanoscale Information fabriCs (SONIC) Center, a multi-university research center based at the University of Illinois at Urbana-Champaign, focused on developing a Shannon/brain-inspired foundation for information processing on CMOS and beyond CMOS nanoscale fabrics.

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Energy Efficient Neural Networks for Big Data Analytics

The world is experiencing a data revolution to discover knowledge in big data. Large scale neural networks are one of the mainstream tools of big data analytics. Processing big data with large scale neural networks includes two phases: the operation phase and the training phase. The energy efficiency (power efficiency) is one of the major considerations of the operation phase. Meanwhile, huge computing power is required to support the training phase. In this talk, Dr. Wang will introduce an energy efficient implementation of neural networks’ operation phase by taking advantage of the emerging memristor (ReRAM) technique. Then Dr. Wang will show some recent results on exploring the computing power of GPUs for big data analytics and demonstrate efficient GPU implementation of the training phase of large scale recurrent neural networks (RNNs) and deep neural networks (DNNs).

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ECE’s Manjunath part of collaborative marine Biodiversity Observation Network (BON) centering on Santa Barbara Channel

kelp on the ocean floor
“One Giant Step for Ocean Biodiversity” — the marine Biodiversity Observation Network in the Santa Barbara Channel has been established to addresses an information gap about marine habitats.

With 13 scientific investigators and 10 partner institutions, the marine biodiversity observation network (BON) centered on the Santa Barbara Channel is the epitome of collaboration. Funded with $5 million by NASA, the Bureau of Ocean Energy Management (BOEM) and the National Oceanic and Atmospheric Administration (NOAA), the UC Santa Barbara-led project officially kicked off Thursday, Oct. 23, at UCSB’s Marine Science Institute (MSI).

“We’ve got principal investigators here from two colleges, a professional school, over six different department on campus, as well our friends at NOAA,” said MSI Director Mark Brzezinski. “It’s an incredibly interdisciplinary team ranging from biology to engineering, and it’s no small feat to bring that kind of group together. Here at UCSB, we really pride ourselves on this kind of interdisciplinary work. It’s our normal mode of operation.”

Designed to fill a gap not addressed by NASA’s Group on Earth Observations (GEO) BON, which focuses on terrestrial biomes, this prototype marine BON seeks to eventually cover a huge range of biodiversity in the oceans. The effort begins in the Santa Barbara Channel where various groups have been gathering a breadth of scientific data ranging from intertidal monitoring to physical oceanographic measurements.

“There have been a huge number of observations taken over time in the channel,” said Robert Miller, a research biologist with MSI and a principal investigator of the marine BON. “The channel has also been a hotspot for remote sensing research, which gives us a wider picture of the area, which we can then match with in-situ observations.”

The marine BON has three goals: to integrate biodiversity data to enable inferences about regional biodiversity; to develop advanced methods in optical and acoustic imaging and to improve monitoring biodiversity in partnership with ongoing monitoring and research programs; and implement a tradeoff framework that optimizes allocation of sampling effort, given the cost of that effort and the information gained from it.

UCSB investigators involved in the project are B.S. Manjunath, director of UCSB’s Center for Bio-Image Informatics; Craig Carlson, chair of the Department of Ecology, Evolution and Marine Biology (EEMB); Deborah Iglesias-Rodriguez, an EEMB professor; Phaedon Kyriakidis, a professor in the Department of Geography; Kevin Lafferty, a principal investigator with MSI and a marine ecologist with the United States Geological Survey’s Western Ecological Research Center; Milton Love and Daniel Reed, research biologists with MSI; Douglas McCauley, an assistant professor in EEMB; Andrew Rassweiler, an assistant research biologist at MSI; and David Siegel, director of the Earth Research Institute. Additional investigators include Andrew Thompson of NOAA’s Southwest Fisheries Science Center.

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Resistive Memory Crossbar: Challenges and Opportunities

Resistive memory devices are very promising candidates to replace the current storage technologies, due to their very high density, fast access time, and retainability. In addition, it finds applications in neural networks, programmable analog circuits, and oscillators. While the memristive phenomenon has been observed for quite some time, recent fabrication advances make it very appealing for such applications. However, there are numerous challenges that need to be addressed before memristor devices could genuinely replace the current technologies, which will be highlighted in this talk. In addition, new circuits and systems will be discussed that are capable of circumventing such challenges facing the memristive systems.

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Technology Revolutions: A Story of Die Stacking (So Far)

Academic researchers often find themselves in a conundrum between doing high-risk, forward-looking research and trying to have more immediate impact on real-world problems. In fact, many in industry (perhaps myself included) are guilty of telling researchers to go look ahead and tell us what the future holds and what industry should do, and then when the researchers come back with stunning visions of the future, we respond with comments like “that’s not practical” or “that’s not how we do things today”. In this talk, I will draw on some of my experiences as both a university professor as well as a researcher in industry, and discuss some computing revolutions and how academic research plays a central and critical role. As an example, I will use the on-going revolution in die-stacking technologies to describe my view of how forward-looking visions combined with evolutionary steps have gotten us to where we are today, why we haven’t gotten here sooner, and why some may want further delays. I will also highlight some other revolutions that are either underway or lurking in the future. From all this, despite the near-term value of incremental near-term innovations to industry, I make the case for academic researchers to continue thinking big and to push the frontiers of computing technologies.

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Design, Fabrication, and Characterization of High Performance III-V nMOSFETs for VLSI Beyond Si-CMOS Scaling Limit

The revolution of the silicon VLSI technology during the past several decades has been ultimately driven by the goal of miniaturization, which leads to an increase in switching speed as well as integration density and a reduced power consumption. As the device size in VLSI has nearly approached its physical limit in the last few years, the industry and academia have been actively evaluat- ing some of the emerging technologies as an alternative to the classical Si-based metal-oxide-semiconductor field-effect-transistors (MOSFETs). Among them, III- V compound semiconductor based transistors are being considered as one of the viable candidates for the future VLSI at scaling generations beyond 7 nm-node. The low electron effective masses in III-V semiconductor materials (i.e. InGaAs) provide superior electron transport properties such as high electron velocity and mobility. According to ballistic transport calculation results, InGaAs based chan- nel devices can potentially exhibit a 1.5 times higher drive current (> 2 mA/μm) even at a lower supply voltage (VDD < 0.7 V) over the Si counterparts. Thus, for faster and smaller integrated circuits with reduced power consumption, III-V based transistors may be the solution to VLSI beyond the physical limitations encountered in scaling of the conventional Si-based MOSFETs.

In order to achieve device performances close to the idealized target, several critical requirements must be met. Firstly, the high-k gate dielectric must be ultra-thin (equivalent oxide thickness < 0.5 nm) and nearly defect-free (interfacial trap density < 1012 /cm2-eV). Hence, any high damage inducing process is not allowed, and surface passivation techniques must be carefully developed. Secondly, the epitaxial layer design should be optimized, especially since there is a trade-off between the on- and off-state performances associated with the channel thickness as well as the indium content. Thirdly, source/drain (S/D) regions must be very heavily doped in order to avoid potential source starvation and to minimize the contact resistivity. Furthermore, this heavy doping must not extend more than 1-2 nm below the depth of the channel to avoid degradation of the short-channel characteristics. Lastly, the device must be highly scalable. To satisfy the tight integration density requirement in VLSI, the gate length and contact pitch should be less than 14 nm and 30 nm, respectively. To achieve this, S/D must be very close to the gate, i.e., self-aligned.

With the abovementioned key design considerations in mind, InGaAs based raised S/D quantum-well MOSFETs have been developed using S/D regrowth as well as the substitutional-gate (i.e. gate-last) scheme. By adopting this device structure, any process-induced damage at the semiconductor/dielectric interface is reduced, and heavily doped S/D is readily formed in a self-aligned manner. Recently, III-V MOSFETs with a record performance have been reported through this work, by implementing sub-1 nm EOT high-k dielectrics with a low interface trap density and adopting an optimized device structure to suppress the off-state degradation at the short channel lengths. A device with a gate length of 18 nm has shown a 3.0 mS/μm peak transconductance (gm) at VDS = 0.5 V, which is the highest peak gm from any reported field-effect transistors to date. A device with an ultra-thin channel and thick vertical spacers at a gate length of 25 nm exhibits an excellent performance in both the on-state and off-state, featuring 2.4 mS/μm peak gm, 77 mV/decade minimum subthreshold swing at VDS = 0.5 V, 76 mV/V drain-induced barrier lowering, and 500 μA/μm on-current at a fixed 100 nA/μm off-current and VDD = 0.5 V. This is the highest on-current from any reported III-V-based MOSFETs and is comparable to state-of-the-art Si-Fin- and nanowire-FETs. In comparison with calculation results obtained from a ballistic FET model, it has been found that the fabricated devices with Lg = 25 nm are operating nearly in the ballistic limit.

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ECE Distinguished Lecture: ‘The Joy of GPS, & the Scourge of Multipath’

photo of speaker with background
The Joy of GPS, why GPS is the coolest technology today: this lecture will explain by showing what makes GPS unique. We’ll start by reviewing how GPS works: just one slide because it’s so simple; yet within minutes you’ll see that the concepts and technology are deep and beautiful. We will cover the science behind GPS, including discoveries and theory from Kepler to Newton and Einstein: all applied together in GPS.

Thanks to GPS, the technology of navigation is experiencing a once-in-a-lifetime transition from a tiny elite to the masses. You will see how GPS exists at the three-way intersection of Technology, Big Science and Society. And we will preview what GPS and related location technologies will mean to us in the future.

The Scourge of Multipath, after introducing you to some of the beauty of the science of GPS, we’ll delve into the greatest unsolved problem: multipath in urban environments. We’ll see what the problem is, why it has proved so intractable, what engineers are doing about it, including here at UCSB. And why it represents one of the great opportunities for young researchers to make an industry-changing breakthrough.

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