Design, Fabrication, and Characterization of High Performance III-V nMOSFETs for VLSI Beyond Si-CMOS Scaling Limit

The revolution of the silicon VLSI technology during the past several decades has been ultimately driven by the goal of miniaturization, which leads to an increase in switching speed as well as integration density and a reduced power consumption. As the device size in VLSI has nearly approached its physical limit in the last few years, the industry and academia have been actively evaluat- ing some of the emerging technologies as an alternative to the classical Si-based metal-oxide-semiconductor field-effect-transistors (MOSFETs). Among them, III- V compound semiconductor based transistors are being considered as one of the viable candidates for the future VLSI at scaling generations beyond 7 nm-node. The low electron effective masses in III-V semiconductor materials (i.e. InGaAs) provide superior electron transport properties such as high electron velocity and mobility. According to ballistic transport calculation results, InGaAs based chan- nel devices can potentially exhibit a 1.5 times higher drive current (> 2 mA/μm) even at a lower supply voltage (VDD < 0.7 V) over the Si counterparts. Thus, for faster and smaller integrated circuits with reduced power consumption, III-V based transistors may be the solution to VLSI beyond the physical limitations encountered in scaling of the conventional Si-based MOSFETs.

In order to achieve device performances close to the idealized target, several critical requirements must be met. Firstly, the high-k gate dielectric must be ultra-thin (equivalent oxide thickness < 0.5 nm) and nearly defect-free (interfacial trap density < 1012 /cm2-eV). Hence, any high damage inducing process is not allowed, and surface passivation techniques must be carefully developed. Secondly, the epitaxial layer design should be optimized, especially since there is a trade-off between the on- and off-state performances associated with the channel thickness as well as the indium content. Thirdly, source/drain (S/D) regions must be very heavily doped in order to avoid potential source starvation and to minimize the contact resistivity. Furthermore, this heavy doping must not extend more than 1-2 nm below the depth of the channel to avoid degradation of the short-channel characteristics. Lastly, the device must be highly scalable. To satisfy the tight integration density requirement in VLSI, the gate length and contact pitch should be less than 14 nm and 30 nm, respectively. To achieve this, S/D must be very close to the gate, i.e., self-aligned.

With the abovementioned key design considerations in mind, InGaAs based raised S/D quantum-well MOSFETs have been developed using S/D regrowth as well as the substitutional-gate (i.e. gate-last) scheme. By adopting this device structure, any process-induced damage at the semiconductor/dielectric interface is reduced, and heavily doped S/D is readily formed in a self-aligned manner. Recently, III-V MOSFETs with a record performance have been reported through this work, by implementing sub-1 nm EOT high-k dielectrics with a low interface trap density and adopting an optimized device structure to suppress the off-state degradation at the short channel lengths. A device with a gate length of 18 nm has shown a 3.0 mS/μm peak transconductance (gm) at VDS = 0.5 V, which is the highest peak gm from any reported field-effect transistors to date. A device with an ultra-thin channel and thick vertical spacers at a gate length of 25 nm exhibits an excellent performance in both the on-state and off-state, featuring 2.4 mS/μm peak gm, 77 mV/decade minimum subthreshold swing at VDS = 0.5 V, 76 mV/V drain-induced barrier lowering, and 500 μA/μm on-current at a fixed 100 nA/μm off-current and VDD = 0.5 V. This is the highest on-current from any reported III-V-based MOSFETs and is comparable to state-of-the-art Si-Fin- and nanowire-FETs. In comparison with calculation results obtained from a ballistic FET model, it has been found that the fabricated devices with Lg = 25 nm are operating nearly in the ballistic limit.

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The Joy of GPS, & the Scourge of Multipath

The Joy of GPS, why GPS is the coolest technology today: this lecture will explain by showing what makes GPS unique. We’ll start by reviewing how GPS works: just one slide because it’s so simple; yet within minutes you’ll see that the concepts and technology are deep and beautiful. We will cover the science behind GPS, including discoveries and theory from Kepler to Newton and Einstein: all applied together in GPS.

Thanks to GPS, the technology of navigation is experiencing a once-in-a-lifetime transition from a tiny elite to the masses. You will see how GPS exists at the three-way intersection of Technology, Big Science and Society. And we will preview what GPS and related location technologies will mean to us in the future.

The Scourge of Multipath, after introducing you to some of the beauty of the science of GPS, we’ll delve into the greatest unsolved problem: multipath in urban environments. We’ll see what the problem is, why it has proved so intractable, what engineers are doing about it, including here at UCSB. And why it represents one of the great opportunities for young researchers to make an industry-changing breakthrough.

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Design and Fabrication of Sub-100 nm Base-Emitter Junctions of THz InP DHBTs

Because of their wide RF bandwidth and high breakdown voltages, npn-InGaAs/InP double heterojunction bipolar transistors (DHBTs) have extensive applications in monolithic microwave integrated circuits (MMICs) such as high performance transceivers, near-terabit optical fiber link, and THz amplifiers in radar/imaging systems. The improvements in the performance of DHBTs were made possible because of device scaling. Two important issues regarding the design and fabrication of the sub-100nm base-emitter junction of DHBTs will be addressed.

First, the process flow for the refractory emitter metal stack developed for DHBTs with 250-100nm emitter width is not feasible for device with <100nm emitter width. In order to further scale DHBT to below 100 nm emitter width, the existing process flow has been re-calibrated. A composite dielectric sidewall process has also been developed for DHBTs to protect the exposed base semiconductor region. With the improved process features, DHBTs with a 85 nm-wide base-emitter junction can be reliably fabricated.

Second, a reduction in DC-current gain (β) associated with device scaling has been observed experimentally. In order to assess the causes of the reduction, the electron transport in the DHBT base region was emulated by a commercial simulator. A model for DC-β at high injection current density was established and verified against the experimental results. The model allows the estimation of β, which benefits the design of the future scaling generations of DHBTs. Moreover, new geometries for the base-emitter junction have been designed in order to suppress the Auger recombination and lateral electron diffusion in the bulk base region. According to our simulation, the new designs could potentially improve the DC-β of THz DHBTs to >50 if the process flow required by the designs could be adequately integrated into the DHBT fabrication.

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“The Ocean’s Future” — ECE Professor and Center for Bio-Image Informatics Director, B.S. Manjunath part of newly formed Marine Biodiversity Observation Network

bed of algae

UCSB scientists lead a team designing a network to track many species of marine organisms over time

Is life in the oceans changing over the years? Are humans causing long-term declines in ocean biodiversity with climate change, fishing and other impacts? At present, scientists are unable to answer these questions because little data exist for many marine organisms, and the small amount of existing data focuses on small, scattered areas of the ocean.

“Currently most of the information we have for marine species is on economically important species like fish and lobster,” said Robert Miller, a research biologist at UC Santa Barbara’s Marine Science Institute. “Little is known about the majority of species out there, even though they may be very important from an ecological point of view. A comprehensive observation network that looks at a broad suite of marine organisms would tell us how marine ecosystems as a whole are doing.”

A group of researchers from UCSB, the USGS, NOAA, National Marine Fisheries Service and UCSD’s Scripps Institution of Oceanography are creating a new prototype system — the Marine Biodiversity Observation Network — to solve this problem. The five-year project led by Miller will center on the Santa Barbara Channel, but the long-term goal is to expand the network around the country and around the world to track over time the biodiversity of marine organisms, from microbes to whales. After a highly competitive proposal process, NASA, the Bureau of Ocean Energy Management (BOEM) and NOAA chose to fund UCSB’s approximately $5 million project.

The Marine Biodiversity Observation Network will integrate existing data over large spatial scales using geostatistical models and will utilize new technology to improve knowledge of marine organisms. Scientists will rely on genetics to accomplish three goals: begin learning about the many kinds of microbes in our coastal waters; identify plankton that would otherwise have to be counted under the microscope over many, many hours; and detect larger animals such as whales and fish by looking for fragments of DNA they have shed into the water. This is known as environmental DNA or eDNA.

The group will use imaging to survey organisms such as kelp forests and deep reefs in underwater habitats where dive-time constraints limit the ability for firsthand exploration. To further this effort, UCSB’s Center for Bio-Image Informatics will use advanced image analysis to automatically identify different species including fish.

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Entering ECE graduate student, Ehsan Omidi, featured in UCSB GradPost article — “Who’s New at UCSB?”

photo of ehsan omidi
Electrical and Computer Engineering is one of the most popular disciplines with 90 graduate students among the 758 new graduate students entering UCSB. These incoming students are diverse in many ways, such as their ages, countries of origin, and fields of study.

Ehsan Omidi comes to UCSB all the way from Tehran, Iran. He earned both a bachelor of science and a master of science in electrical engineering from Amirkabir University of Technology in Tehran. He enters the Ph.D. program in electrical and computer engineering under guidance of Associate Professor Yasamin Mostofi with a concentration in control, communication, and signal processing.

Both of Omidi’s parents were schoolteachers, and he has always excelled in academics. Growing up, he had many of the same hobbies as his friends, including soccer, cartoons and video games.

“But,” he said, “my real hobby started when we had a computer in our home and I started programming with it. Since then, programming has been my main entertainment.”

When he realized that computer programming didn’t challenge him enough, he began to study electrical engineering in order to figure out what goes on inside a computer. He also worked on his university’s robotics team in creating a simple robot that could do funny tasks such as playing with a golf ball.

Omidi is very excited to be studying at UCSB, which is among the top 10 engineering schools in the world (Academic Ranking of World Universities). It also doesn’t hurt that Santa Barbara is, in Omidi’s words, “totally a perfect city.” He said, “Living in an always-sunny city with beautiful landscapes wherever you look and doing your desired research is what every grad student dreams.”

Omidi’s hobbies include soccer, violin and chess, and he hopes to add hiking and surfing in Santa Barbara to the list.

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Feedback Control and the Coming Machine Revolution

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We are at the cusp of a revolution: we can now create machines that adapt their behavior based on their environment and the results of their actions. The enablers for this revolution are sensing, communication, and computation technologies, innovative designs and novel mechanisms, and the feedback control algorithms that rule the machines. These creations will have unprecedented effects on our lives – some welcome, others not. In this talk, D’Andrea outlines how we got here, where we are going, and the consequences.

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Image Reconstruction for Multistatic Stepped Frequency-Modulated Continuous Wave (FMCW) Ultrasound Imaging Systems with Reconfigurable Arrays

The standard architecture of a medical ultrasound transducer is a linear phased array of piezoelectric elements in a compact, hand-held form. Acoustic energy not directly reflected back towards the transducer elements during a transmit-receive cycle amounts to lost information for image reconstruction. To mitigate this loss, a large, flexible transducer array which conforms to contours of the subject’s body would result in a greater effective aperture and an increase in received image data. However, in this reconfigurable array design, element distributions are irregular and an organized arrangement can no longer be assumed. Phased array architecture also has limited scalability potential for large 2D arrays.

This research work investigates a multistatic, stepped-FMCW modality as an alternative to array phasing in order to accommodate the flexible and reconfigurable nature of an array. A space-time reconstruction algorithm was developed for the imaging system. We include ultrasound imaging experiments and describe a simulation method for quickly predicting imaging performance for any given target and array configuration. Lastly, we demonstrate two reconstruction techniques for improving image resolution. The first takes advantage of the statistical significance of pixel contributions prior to the final summation, and the second corrects data errors originating from the stepped-FMCW quadrature receiver.

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Integrated Photonics in Silicon and Silicon Nitride-on-silicon Platforms

photo of joyce poon
The surging progress in silicon photonics over the past decade has been driven by its potential application in low cost, high bandwidth, wavelength-division multiplexed short reach optical interconnect. Despite significant advances, numerous technical challenges remain, such as the control of resonant devices, the implementation of large swing optical modulators, the management of polarization, the need for improved variation tolerance, an effective means for efficient and broadband fiber-to-chip optical coupling, and approaches to electronic-photonic integration.

In this talk, I will provide an overview of my group’s progress in addressing these issues in silicon -based photonic platforms. Photonic devices and integrated circuits implemented in standard silicon -on-insulator photonic platforms and a custom silicon nitride-on-silicon platform will be presented. I will describe microring modulators and filters that circumvent conventional limits, the first polarization rotator-splitters and controllers in standard silicon photonic platforms, grating couplers with record-setting bandwidths and insertion losses, and our ongoing efforts in electronic integration. The work paves the path toward very large scale photonic integrated circuits and terabit-scale optical transceivers.

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Distributed Smart Cameras and Long-Term Care of Special Needs People

We will discuss our work on distributed smart cameras and algorithms (developed with Honggab Kim and Justin Romberg) for tracking from cameras with non-overlapping fields of view. We developed an improved model for traffic movement in a network of cameras for use with Markov chain Monte Carlo (MCMC) solution. We have also developed a distributed algorithm for MCMC tracking that does not rely on a centralized server. We will also discuss applications to the long-term care of special needs adults.

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Enhancing the Capability of Constrained Random Test Program Generators via Learning and Test Program Filtering

Functional verification of RTL is one of the primary and most time consuming tasks of microprocessor design. However, designs cannot be completely verified due to their large size and strict time-to-market restrictions. Being more scalable, simulation-based verification has become the mainstay of functional verification. A majority of the randomly generated tests used for design simulation are, however, redundant. This work proposes a two-step approach to achieve faster verification closure.

We propose a novel methodology to improve the effectiveness of one test generator with respect to another. First, we evaluate the effectiveness of using a legacy test generator used at AMD and quantify its verification performance. We explore the differences in the design and capabilities between the legacy test generator and AMD’s latest in-house x86 ISA-based test generator. We then proceed to gather experimental evidence to support our understanding. We propose to utilize external test filters to overcome the limitations of the latest exerciser.

We develop a test filtration approach that is independent of the test generator, to filter out ineffective tests prior to RTL simulation. We achieve this by using ISA simulation traces. We find that using a combination of ISA simulation traces and microarchitectural models is necessary to cover a wider range of coverpoints. Our work shows that by using implementation specific details for extrapolating test behavior information present in simulation traces, we can compensate for microarchitecture agnostic test generation and consequently improve the effectiveness of a test generator without modifying its design. The proposed approach expedites coverage closure by providing precise control over random test behavior. Experimental results based on the latest AMD multi-core processor design are presented to demonstrate the feasibility of our proposed approach.

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