Page last updated on 2014 August 22

All journal articles, conference papers, workshop papers, and book chapters in the following list are refereed, unless otherwise noted. Excluded from the list are 100+ original articles and limited-circulation manuscripts, 60+ published critical reviews (such as book or paper reviews in *IEEE Computer*, *Computer Architecture News*, and *Mathematical Reviews*), 160+ technical presentations (conferences, seminars, public speeches, mass media programs, short courses), 20+ course notes and readers, 70+ reports and proposals, 90+ technical translations and adaptations, and numerous technical correspondence items and short topical contributions to scientific periodicals. See Appendices to B. Parhami's CV for lists of the aforementioned excluded items. Note that Appendix B contains a partial list of bibliographic citations of B. Parhami's publications. Citation data can also be found on his Google Scholar profile, which as of October 02, 2013, lists 4011 total citations (1845, since 2008), an h-index of 25 (18, since 2008), 1148 citations of his book on computer arithmetic [259], and 165/161 citations for his two most cited papers [101]/[066]. Professor Parhami has been honored with an award for the most cited contribution to *J. Parallel and Distributed Computing* over the period 2005-10 [224].

Publications for 2010-2014: items 259-

Publications for 2005-2009: items 213-258

Publications for 2000-2004: items 179-212

Publications for 1995-1999: items 102-178

Publications for 1990-1994: items 066-101

Publications for 1980-1989: items 037-065

Publications for 1970-1979: items 001-036

**[IETCDT]** [in press] [Journal article] [PDF of corrected proofs]

B. Parhami, "Truncated Ternary Multipliers,"
*IET Computers & Digital Techniques*, to appear (accepted on July 31, 2014).

**[CompJ]** [in press] [Journal article] [PDF of corrected proofs]

B. Parhami, "Digital Arithmetic in Nature: Continuous-Digit RNS,"
*The Computer J.*, to appear (accepted on June 24, 2014).

**[283]** [2014] [Conference keynote] [PDF, PPTX]

B. Parhami, "Engineering the Future: Toward Self-Organizing, Self-Improving, Self-Healing, and Self-Sustaining Systems,"

Keynote at Sharif Univ. of Technology Association's 8th Global Reunion, Milan, Italy, 1-3 August 2014.

**[282]** [2013e] [Journal article] [PDF]

S. Abdel-hafeez, A. Gordon-Ross, and B. Parhami, "Scalable Digital CMOS Comparator Using a Parallel Prefix Tree,"
*IEEE Trans. VLSI Systems*, Vol. 21, No. 11, pp. 1989-1998, November 2013.

**[281]** [2013d] [Conference paper] [PDF]

M. Lastras and B. Parhami, "A Logarithmic Approach to Energy-Efficient GPU Arithmetic for Mobile Devices,"
*Proc. 47th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 3-6 November 2013, to appear.

**[280]** [2013c] [Conference paper] [PDF]

M. Chugh and B. Parhami, "Logarithmic Arithmetic as an Alternative to Floating-Point: A Review,"
*Proc. 47th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 3-6 November 2013, to appear.

**[279]** [2013b] [Conference paper] [PDF]

B. Parhami and Michael McKeown, "Arithmetic with Binary-Encoded Balanced Ternary Numbers,"
*Proc. 47th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 3-6 November 2013, to appear.

**[278]** [2013a] [Journal article] [PDF]

B. Parhami, "Exact Formulas for the Average Internode Distance in Mesh and Binary Tree Networks,"
*Computer Science and Information Technology*, Vol. 1, No. 2, pp. 165-168, 2013.

**[277]** [2013] [Journal article] [PDF]

S. Abdel-hafeez and B. Parhami, "High-Speed and Low-Power Scalable Hamming Weight Comparator Based on a Nonweighted Switched-Capacitor Array,"
*Analog Integrated Circuits and Signal Processing*, Vol. 75, No. 3, pp. 417-434, June 2013.

On-line publication 2012/12/07.

**[276]** [2012d] [Journal article] [PDF]

W. J. Xiao, H. Liang, and B. Parhami, "A Class of Data Center Network Models Offering Symmetry, Scalability, and Reliability,"
*Parallel Processing Letters*, Vol. 22, No. 4, 10 pp., December 2012.

**[275]** [2012c] [Journal article] [PDF]

G. Jaberipur and B. Parhami, "Efficient Realisation of Arithmetic Algorithms with Weighted Collection of Posibits and Negabits,"
*IET Computers & Digital Techniques*, Vol. 6, No. 5, pp. 259-268, September 2012.

**[274]** [2012b] [Journal article] [PDF]

W. Chen, W. Xiao, and B. Parhami, "Nearly Optimal Node-to-Set Parallel Routing in OTIS Networks,"
*J. Interconnection Networks*, Vol. 13, Nos. 1-2, 48 pp., March & June 2012.

**[273]** [2012a] [Book supplement]

B. Parhami, *Instructor's Solutions Manual for Algorithms and Design Methods for Digital Computer Arithmetic*,

Oxford University Press, New York, 2012. ISBN: 978-0-19-976694-9.

**[272]** [2012] [Book]

B. Parhami, *Algorithms and Design Methods for Digital Computer Arithmetic*,

Oxford University Press, New York, 2012. ISBN: 978-0-19-976693-2.

International ed. of publication [259].

**[271]** [2011b] [Conference paper] [PDF]

G. Jaberipur, B. Parhami, and S. Nejati, "On Building General Modular Adders from Standard Binary Arithmetic Components,"
*Proc. 45th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 6-9 November 2011, pp. 154-159.

**[270]** [2011a] [Journal article] [PDF]

W. J. Xiao, B. Parhami, W. D. Chen, M. X. He, and W. H. Wei, "Biswapped Networks: A Family of Interconnection Architectures with Advantages over Swapped or OTIS Networks,"
*Int'l J. Computer Mathematics*, Vol. 88, No. 13, pp. 2669-2684, 2011.

**[269]** [2011] [Journal article] [PDF]

W. J. Xiao, W. D. Chen, and B. Parhami, "On Necessary Conditions for Scale-Freedom in Complex Networks, with Applications to Computer Communication Systems,"
*Int'l J. Systems Science*, Vol. 42, No. 6, pp. 951-958, June 2011 (e-publication in March 2010).

**[268]** [2010i] [Conference paper] [PDF]

B. Parhami, "On Equivalences and Fair Comparisons Among Residue Number Systems with Special Moduli,"
*Proc. 44th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 7-10 November 2010, pp. 1690-1694.

**[267]** [2010h] [Conference paper] [PDF]

D. Torno and B. Parhami, "Arithmetic Operators Based on the Binary Stored-Carry-or-Borrow Representation,"
*Proc. 44th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 7-10 November 2010, pp. 1148-1152.

**[266]** [2010g] [Conference paper] [PDF]

G. Jaberipur and B. Parhami, "Posibits, Negabits, and Their Mixed Use in Efficient Realization of Arithmetic Algorithms,"
*Proc. 15th CSI Int'l Symp. Computer Architecture & Digital Systems*, Tehran, September 2010, pp. 3-9.

**[265]** [2010f] [Journal article] [PDF]

S. Zhou, W. J. Xiao, and B. Parhami, "Construction of Vertex-Disjoint Paths in Alternating Group Networks,"
*J. Supercomputing*, Vol. 54, No. 2, pp. 206-228, 2010.

**[264]** [2010e] [Invited book chapter] [PDF]

B. Parhami, "Combinational Circuits,"
*Wiley Encyclopedia of Electrical and Electronics Engineering*, J. G. Webster (ed.), revised ed., 2010.

Revised and updated version of publication [165].

**[263]** [2010d] [Journal article] [PDF]

G. Jaberipur, B. Parhami, and S. Gorgin, "Redundant-Digit Floating-Point Addition Scheme Based on a Stored Rounding Value,"
*IEEE Trans. Computers*, Vol. 59, No. 5, pp. 694-706, May 2010.

**[262]** [2010c] [Conference keynote] [PDF, PPT]

B. Parhami, "Robustness Attributes of Interconnection Networks for Parallel Processing,"
*Digest 1st Int'l Supercomputing Conf.*, Guadalajara, Mexico, 2-5 March 2010, pp. TBD.

**[261]** [2010b] [Journal article] [PDF]

W. J. Xiao, B. Parhami, W. D. Chen, M. X. He, and W. H. Wei "Fully Symmetric Swapped Networks Based on Bipartite Cluster Connectivity,"
*Information Processing Letters*, Vol. 110, No. 6, pp. 211-215, 15 February 2010.

**[260]** [2010a] [Book supplement] [Website]

B. Parhami, *Instructor's Solutions Manual for Computer Arithmetic: Algorithms and Hardware Designs*,

Oxford University Press, New York, 2nd ed., 200 pp., 2010, ISBN: 978-0-19-537418-6.

Lecture slides available at the book's website; 2nd ed. of publication [180].

**[259]** [2010] [Book] [Website]

B. Parhami, *Computer Arithmetic: Algorithms and Hardware Designs*,

Oxford University Press, New York, 2nd ed., 641 + xxv pp., 2010, ISBN: 978-0-19-532848-6.

Instructor support material and errata available at the book's website; 2nd ed. of publication [179].

**[258]** [2009i] [Conference paper] [PDF]

B. Parhami, "Digital/Analog Arithmetic with Continuous-Valued Residues,"
*Proc. 43rd Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 1-4 November 2009, pp. 1787-1791.

**[257]** [2009h] [Conference paper] [PDF]

Gorgin, S., G. Jaberipur, and B. Parhami, "Design and Evaluation of Decimal Array Multipliers,"
*Proc. 43rd Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 1-4 November 2009, pp. 1782-1786.

**[256]** [2009g] [Conference paper] [PDF]

W. Xiao, L. Peng, and B. Parhami, "On General Laws of Complex Networks,"
*Proc. 1st Int'l Conf. Complex Sciences*, J. Zhou (ed.), Springer, 2009, Part 1, pp. 118-124.

**[255]** [2009f] [Journal article] [PDF]

B. Parhami, "Motivating Computer Engineering Freshmen Through Mathematical and Logical Puzzles,"
*IEEE Trans. Education*, Vol. 52, No. 3, pp. 360-364, August 2009.

**[254]** [2009e] [Conference paper] [PDF] [Online supplement]

G. Jaberipur and B. Parhami, "Unified Approach to the Design of Modulo-(2^{n}±1) Adders Based on Signed-LSB Representation of Residues,"
*Proc. 19th IEEE Int'l Symp. Computer Arithmetic*, Portland, OR, 8-10 June 2009, pp. 57-64.

**[253]** [2009d] [Journal article] [PDF]

C. Zhao, W. J. Xiao, and B. Parhami, "Load Balancing on Swapped or OTIS Networks,"
*J. Parallel and Distributed Computing*, Vol. 69, No. 4, pp. 389-399, April 2009.

**[252]** [2009c] [Journal article] [PDF]

B. Parhami, "Puzzling Problems in Computer Engineering,"
*IEEE Computer*, Vol. 42, No. 3, pp. 26-29, March 2009.

**[251]** [2009b] [Journal article] [PDF]

W. Chen, W. J. Xiao, and B. Parhami, "Swapped (OTIS) Networks Built of Connected Basis Networks are Maximally Fault Tolerant,"
*IEEE Trans. Parallel and Distributed Systems*, Vol. 20, No. 3, pp. 361-366, March 2009.

**[250]** [2009a] [Journal article] [PDF]

B. Parhami, "Efficient Hamming Weight Comparators for Binary Vectors Based on Accumulative and Up/Down Parallel Counters,"
*IEEE Trans. Circuits and Systems II*, Vol. 56, No. 2, pp. 167-171, February 2009.

**[249]** [2009] [Journal article] [PDF]

W. J. Xiao and B. Parhami, "On Routing and Diameter of Metacyclic Graphs,"
*International J. Computer Mathematics*, Vol. 86, No. 1, pp. 21-30, January 2009.

**[248]** [2008g] [Journal article] [PDF]

B. Parhami, "A Puzzle-Based Seminar for Computer Engineering Freshmen,"
*Computer Science Education*, Vol. 18, No. 4, pp. 261-277, December 2008.

**[247]** [2008f] [Journal article] [PDF]

W. Xiao, W. Wei, W. Chen, M. He, and B. Parhami, "Comments on 'Low Diameter Interconnections for Routing in High-Performance Parallel Systems,' with Connections and Extensions to Arc Coloring of Coset Graphs,"
*IEEE Trans. Computers*, Vol. 57, No. 12, pp. 1726-1728, December 2008.

**[246]** [2008e] [Conference paper] [PDF]

W. Xiao, W. Chen, W. Wei, and B. Parhami, "On Necessary Conditions for Scale-Freedom in Complex Networks with Applications to Computer Communication Systems,"
*Proc. Int'l Conf. Intelligent Networks and Intelligent Systems*, Wuhan, China, 1-3 November 2008, pp. 187-190.

**[245]** [2008d] [Journal article] [PDF]

B. Parhami, "On Isomorphisms and Similarities Between Generalized Petersen Networks and Periodically Regular Chordal Rings,"
*Information Processing Letters*, Vol. 107, No. 6, pp. 246-251, 31 August 2008.

**[244]** [2008c] [Journal article] [PDF]

B. Parhami, "Periodically Regular Chordal Rings are Preferable to Double-Ring Networks,"
*J. Interconnection Networks*, Vol. 9, Nos. 1-2, pp. 99-126, March-June 2008.

**[243]** [2008b] [Edited book] [PDF of front matter] [PDF of author index]

H. Sarbazi-Azad, B. Parhami, S. G. Miremadi, and S. Hessabi, *Advances in Computer Science and Engineering: Proceedings of the CSI Computer Conference* (CSICC-13), held on Kish Island, Iran, March 9-11, 2008.

Springer "Communications in Computer and Information Science" series, CCIS Vol. 6, 2008.

**[242]** [2008a] [Journal article] [PDF]

B. Parhami, "Double-Least-Significant-Bits 2's-Complement Number Representation Scheme with Bitwise Complementation and Symmetric Range,"
*IET Circuits, Devices & Systems*, Vol. 2, No. 2, pp. 179-186, April 2008.

Honored in 2009 with the *IET CDS* Premium Achievement Award (best paper).

**[241]** [2008] [Journal article] [PDF]

G. Jaberipur and B. Parhami, "Constant-Time Addition with Hybrid-Redundant Numbers: Theory and Implementations,"
*Integration, the VLSI Journal*, Vol. 41, No. 1, pp. 49-64, January 2008. Published on-line in February 2007.

**[240]** [2007i] [Book] [Website]

B. Parhami, *Arquitectura de Computadoras: De los Microprocesadores a las Supercomputadoras*,

McGraw-Hill, Mexico, 558 + xx pp., 2007, ISBN 970-10-6146-6.

Spanish edition of publication [213], translated by A.V. Mena.

**[239]** [2007h] [Conference paper] [PDF]

W. Chen, W. J. Xiao, and B. Parhami, "An Efficient Construction of Node Disjoint Paths in OTIS Networks,"
*Proc. 7th Int'l Symp. Advanced Parallel Processing Technologies*, Guangzhou, China, 22-23 November 2007, Springer, Lecture Notes in Computer Science, Vol. 4847, pp. 180-189.

**[238]** [2007g] [Journal article] [PDF]

W. J. Xiao and B. Parhami, "Structural Properties of Cayley Digraphs with Applications to Mesh and Pruned Torus Interconnection Networks,"
*International J. Computer and System Sciences*, Vol. 73, No. 8, pp. 1232-1239, December 2007.

Special Issue on Network-Based Computing.

**[237]** [2007f] [Journal article] [PDF]

W. J. Xiao, W. Wei, W. Chen, Y. Qin, and B. Parhami, "Extended Clustering Coefficients: Generalization of Clustering Coefficients in Small-World Networks,"
*J. Systems Science and Systems Engineering*, Vol. 16, No. 3, pp. 370-382, September 2007.

**[236]** [2007e] [Journal article] [PDF]

W. J. Xiao and B. Parhami, "Further Mathematical Properties of Cayley Digraphs Applied to Hexagonal and Honeycomb Meshes,"
*Discrete Applied Mathematics*, Vol. 155, No. 13, pp. 1752-1760, August 2007.

**[235]** [2007d] [Conference paper] [PDF]

W. Xiao, W. Chen, M. He, W. Wei, and B. Parhami, "Biswapped Networks and Their Topological Properties,"
*Proc. 8th Int'l Conf. Software Engineering, Artificial Intelligence, Networking, and Parallel/Distributed Computing*, Qingdao, China, July 2007, Vol. 2, pp. 193-198.

**[234]** [2007c] [Conference paper] [PDF]

W. Xiao, Y. Qin, and B. Parhami, "Extended Clustering Coefficients of Small-World Networks,"
*Proc. Int'l Conf. Computational Science*, Beijing, May 2007, Part IV, pp. 67-73.

Lecture Notes in Computer Science, Vol. 4490, Springer-Verlag, ed. by Y. Shi et al.

**[233]** [2007b] [Journal article] [PDF]

W. Xiao and B. Parhami, "A Group Construction Method with Applications to Deriving Pruned Interconnection Networks,"
*IEEE Trans. Parallel and Distributed Systems*, Vol. 18, No. 5, pp. 637-643, May 2007.

**[232]** [2007a] [Conference paper] [PDF]

B. Parhami, "Distributed Interval Voting with Node Failures of Various Types,"
*Proc. 12th IEEE Workshop Dependable Parallel, Distributed, and Network-Centric Systems*, March 2007.

**[231]** [2007] [Journal article] [PDF]

G. Jaberipur and B. Parhami, "Stored-Transfer Representations with Weighted Digit-Set Encodings for Ultrahigh-Speed Arithmetic,"
*IET Circuits, Devices, and Systems*, Vol. 1, No. 1, pp. 102-110, February 2007.

**[230]** [2006e] [Journal article] [PDF]

B. Parhami, "A Class of Odd-Radix Chordal Ring Networks,"
*CSI J. Computer Science and Engineering*, Vol. 4, Nos. 2 & 4, pp. 1-9, 2006.

**[229]** [2006d] [Journal article] [PDF]

B. Chen, W. Xiao, and B. Parhami, "Internode Distance and Optimal Routing in a Class of Alternating Group Networks,"
*IEEE Trans. Computers*, Vol. 55, No. 12, pp. 1645-1648, December 2006.

**[228]** [2006c] [Conference paper] [PDF]

B. Parhami, "Fault-Tolerant Reversible Circuits,"
*Proc. 40th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 29 October to 1 November 2006, pp. 1726-1729.

**[227]** [2006b] [Conference paper] [PDF]

W. Xiao and B. Parhami, "Further Properties of Cayley Digraphs and Their Applications to Interconnection Networks,"
*Proc. 3rd Conf. Theory and Applications of Models of Computation*, Beijing, 15-20 May 2006, pp. 192-197.

Lecture Notes in Computer Science, Vol. 3959, Springer-Verlag, ed. by Y. Cai, S.B. Cooper, and A. Li.

**[226]** [2006a] [Journal article] [PDF]

G. Jaberipur, B. Parhami, and M. Ghodsi, "An Efficient Universal Addition Scheme for All Hybrid-Redundant Representations with Weighted Bit-Set Encoding,"
*J. VLSI Signal Processing*, Vol. 42, No. 2, pp. 149-158, February 2006.

**[225]** [2006] [Journal article] [PDF]

W. J. Xiao and B. Parhami, "Cayley Graphs as Models of Deterministic Small-World Networks,"
*Information Processing Letters*, Vol. 97, No. 3, pp. 115-117, 14 February 2006.

**[224]** [2005k] [Journal article] [PDF]

B. Parhami, "Swapped Interconnection Networks: Topological, Performance, and Robustness Attributes,"
*J. Parallel and Distributed Computing*, Vol. 65, No. 11, pp. 1443-1452, November 2005.

Special Issue on Design and Performance of Networks for Super-, Cluster-, and Grid-Computing.

Named as top-cited *JPDC* article during 2005-10 (award certificate received in 2010).

**[223]** [2005j] [Invited book chapter] [PDF]

B. Parhami, "Voting: A Paradigm for Adjudication and Data Fusion in Dependable Systems,"

Chapter 4 in *Dependable Computing Systems: Paradigms, Performance Issues, & Applications*, ed. by H. B. Diab and A. Y. Zomaya, Wiley, 2005, pp. 87-114.

**[222]** [2005i] [Journal article] [PDF]

B. Parhami, "The Hamiltonicity of Swapped (OTIS) Networks Built of Hamiltonian Component Networks,"
*Information Processing Letters*, Vol. 95, No. 4, pp. 441-445, 31 August 2005.

**[221]** [2005h] [Journal article] [PDF]

B. Parhami and M. Rakov, "Performance, Algorithmic, and Robustness Attributes of Perfect Difference Networks," *IEEE Trans. Parallel and Distributed Systems*, Vol. 16, No. 8, pp. 725-736, August 2005.

**[220]** [2005g] [Journal article] [PDF]

B. Parhami and M. Rakov, "Perfect Difference Networks and Related Interconnection Structures for Parallel and Distributed Systems,"
*IEEE Trans. Parallel and Distributed Systems*, Vol. 16, No. 8, pp. 714-724, August 2005.

**[219]** [2005f] [Journal article] [PDF]

G. Jaberipur, B. Parhami, and M. Ghodsi, "Weighted Two-Valued Digit-Set Encodings: Unifying Efficient Hardware Representation Schemes for Redundant Number Systems,"
*IEEE Trans. Circuits and Systems I*, Vol. 52, No. 7, pp. 1348-1357, July 2005.

**[218]** [2005e] [Journal article] [PDF]

B. Chen, W.J. Xiao, and B. Parhami, "Diameter Formulas for a Class of Undirected Double-Loop Networks,"
*J. Interconnection Networks*, Vol. 6, No. 1, pp. 1-15, March 2005 (published in July).

**[217]** [2005d] [Conference paper] [PDF]

B. Parhami and M. Rakov, "Application of Perfect Difference Sets to the Design of Efficient and Robust Interconnection Networks,"
*Proc. Int'l Conf. Communications in Computing*, Las Vegas, NV, 27-30 June 2005, pp. 207-213.

**[216]** [2005c] [Conference paper] [PDF]

B. Parhami, "Chordal Rings Based on Symmetric Odd-Radix Number Systems,"
*Proc. Int'l Conf. Communications in Computing*, Las Vegas, NV, 27-30 June 2005, pp. 196-199.

**[215]** [2005b] [Journal article] [PDF]

W. J. Xiao and B. Parhami, "Some Mathematical Properties of Cayley Digraphs with Applications to Interconnection Network Design,"
*International J. Computer Mathematics*, Vol. 82, No. 5, pp. 521-528, May 2005 (appeared on-line in March).

**[214]** [2005a] [Book supplement] [Website]

B. Parhami, *Instructor's Solutions Manual for Computer Architecture: From Microprocessors to Supercomputers*,

Oxford University Press, New York, 88 + vi pp., 2005, ISBN 0-19-522213-X.

Includes a CD with lecture slides, ISBN: 0-19-522219-9 (slides also available from the book's website).

**[213]** [2005] [Book] [Website]

B. Parhami, *Computer Architecture: From Microprocessors to Supercomputers*,

Oxford University Press, New York, 556 + xx pp., 2005, ISBN; 0-19-515455-X.

Instructor support material and errata available at the book's website.

**[212]** [2004c] [Journal article] [PDF]

B. Parhami and D.-M. Kwai, "Comparing Four Classes of Torus-Based Parallel Architectures: Network Parameters and Communication Performance," *Mathematical and Computer Modeling*, Vol. 40, Nos. 7-8, pp. 701-720, October 2004.

**[211]** [2004b] [Conference paper] [PDF] [PS]

W. J. Xiao and B. Parhami, "Hexagonal and Pruned Torus Networks as Cayley Graphs,"
*Proc. Int'l Conf. Communications in Computing*, Las Vegas, NV, 21-24 June 2004, pp. 107-112.

**[210]** [2004a] [Conference paper] [PDF] [PS]

B. Parhami, "Some Properties of Swapped Interconnection Networks,"
*Proc. Int'l Conf. Communications in Computing*, Las Vegas, NV, 21-24 June 2004, pp. 93-99.

**[209]** [2004] [Journal article] [PDF]

B. Parhami and D.-M. Kwai, "Incomplete k-ary n-cube and Its Derivatives,"
*J. Parallel and Distributed Computing*, Vol. 64, No. 2, pp. 183-190, February 2004.

**[208]** [2003b] [Conference paper] [PDF]

W. J. Xiao and B. Parhami, "Some Conclusions on Cayley Digraphs and Their Applications to Interconnection Networks,"
*Proc. 2nd Int'l Workshop Grid and Cooperative Computing*, Shanghai, 7-10 December 2003, pp. 408-412.

Lecture Notes in Computer Science, Vol. 3033, ed. by M. Li et al, Springer-Verlag, 2004.

**[207]** [2003a] [Journal article] [PDF]

B. Parhami, "Tight Upper Bounds on the Minimum Precision Required of the Divisor and the Partial Remainder in High-Radix Division,"
*IEEE Trans. Computers*, Vol. 52, No. 11, pp. 1509-1514, November 2003.

**[206]** [2003] [Journal article] [PDF]

B. Parhami and D.-M. Kwai, "Parallel Architectures and Adaptation Algorithms for Programmable FIR Digital Filters with Fully Pipelined Data and Control Flows,"
*J. Information Science and Engineering*, Vol. 19, No. 1, pp. 59-74, January 2003.

**[205]** [2002e] [Conference paper] [PDF] [PS]

G. Jaberipur, B. Parhami, and M. Ghodsi, "Weighted Bit-Set Encodings for Redundant Digit Sets: Theory and Applications", *Proc. 36th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 3-6 November 2002, pp. 1629-1633.

**[204]** [2002d] [Conference paper] [PDF] [PS]

B. Parhami, "An Approach to the Design of Parity-Checked Arithmetic Circuits"
*Proc. 36th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, pp. 1084-1088, 3-6 November 2002.

**[203]** [2002c] [Invited book chapter] [PDF]

B. Parhami, "Number Representation and Computer Arithmetic,"
*Encyclopedia of Information Systems*, Academic Press, Vol. 3, pp. 317-333, 2002.

**[202]** [2002b] [Conference paper] [PDF] [PS]

B. Parhami, "ART: Robustness of Meshes and Tori for Parallel and Distributed Computation,"
*Proc. Int'l Conf. Parallel Processing*, Vancouver, Canada, pp. 463-472, 18-21 August 2002.

**[201]** [2002a] [Invited conference paper] [PDF] [PS]

B. Parhami, "Parity-Preserving Transformations in Computer Arithmetic,"
*Proc. SPIE Conf. Advanced Signal Processing Algorithms, Architectures, and Implementations XII*, Seattle, WA, 7-11 July 2002, pp. 403-411.

**[200]** [2002] [Invited conference paper] [PDF] [PS]

B. Parhami, "Application of Symmetric Redundant Residues for Fast and Reliable Arithmetic,"
*Proc. SPIE Conf. Advanced Signal Processing Algorithms, Architectures, and Implementations XII*, Seattle, WA, 7-11 July 2002, pp. 393-402.

**[199]** [2001h] [Journal article] [PDF]

B. Parhami, "Approach to Component Based Synthesis of Fault-Tolerant Software,"
*Informatica*, Vol. 25, No. 4, pp. 533-543, November 2001.

Special Issue on Component Based Software Development,

**[198]** [2001g] [Conference paper] [PDF]

B. Parhami, "Precision Requirements for Quotient Digit Selection in High-Radix Division,"
*Proc. 35th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 4-7 November 2001, pp. 1670-1673.

**[197]** [2001f] [Invited conference paper] [PDF]

B. Parhami, "RNS Representations with Redundant Residues,"
*Proc. 35th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 4-7 November 2001, pp. 1651-1655.

**[196]** [2001e] [Conference paper] [PDF]

G. Jaberipur, B. Parhami, and M. Ghodsi, "A Class of Stored-Transfer Representations for Redundant Number Systems,"
*Proc. 35th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 4-7 November 2001, pp. 1304-1308.

**[195]** [2001d] [Conference paper] [PDF] [PS]

C.-H. Yeh and B. Parhami, "Parallel Algorithms for Index-Permutation Graphs -- An Extension of Cayley Graphs for Multiple Chip-Multiprocessors,"
*Proc. Int'l Conf. Parallel Processing*, Valencia, Spain, 3-7 September 2001, pp. 3-12.

**[194]** [2001c] [Journal article] [PDF]

D.-M. Kwai and B. Parhami, "Scalable Linear Array Architecture with Data-Driven Control for Ultrahigh-Speed Vector Quantization,"
*J. VLSI Signal Processing*, Vol. 28, No. 3, pp. 235-243, July 2001.

**[193]** [2001b] [Conference paper] [PDF] [PS]

C.-H. Yeh and B. Parhami, "On the VLSI Area and Bisection Width of Star Graphs and Hierarchical Cubic Networks,"
*Proc. Int'l Parallel and Distributed Processing Symp.*, San Francisco, CA, 23-27 April 2001, 8 pp. in CD-ROM proceedings, abstract on p. 72 of hard-copy program.

**[192]** [2001a] [Conference paper] [PDF] [PS]

C.-H. Yeh, B. Parhami, E.A. Varvarigos, and T.A. Varvarigou, "RACE: A Software-Based Fault Tolerance Scheme for Systematically Transforming Ordinary Algorithms to Robust Algorithms,"
*Proc. Int'l Parallel and Distributed Processing Symp.*, San Francisco, CA, 23-27 April 2001, 6 pp. in CD-ROM proceedings, abstract on p. 32 of hard-copy program.

**[191]** [2001] [Journal article] [PDF]

B. Parhami and D.-M. Kwai, "A Unified Formulation of Honeycomb and Diamond Networks,"
*IEEE Trans. Parallel and Distributed Systems*, Vol. 12, No. 1, pp. 74-80, January 2001.

**[190]** [2000k] [Conference paper] [PDF]

C.-H. Yeh, E.A. Varvarigos, and B. Parhami, "Optimal-Depth Circuits for Prefix Computation and Addition,"
*Proc. 34th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 29 October to 1 November 2000, pp. 1349-1353.

**[189]** [2000j] [Conference paper] [PDF]

C.-H. Yeh, B. Parhami, and Y. Wang, "Designs of Counters with Near-Minimal Counting/Sampling Periods and Hardware Complexity,"
*Proc. 34th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 29 October to 1 November 2000, pp. 894-898.

**[188]** [2000i] [Conference paper] [PDF]

B. Parhami, "On Producing Exactly Rounded Results in Digit-Serial On-Line Arithmetic,"
*Proc. 34th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 29 October to 1 November 2000, pp. 889-893.

**[187]** [2000h] [Conference paper] [PDF]

B. Parhami, "Configurable Arithmetic Arrays With Data-Driven Control,"
*Proc. 34th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 29 October to 1 November 2000, pp. 89-93.

**[186]** [2000g] [Conference paper] [PDF] [PS]

C.-H. Yeh, E.A. Varvarigos, and B. Parhami, "Multilayer VLSI Layout for Interconnection Networks,"
*Proc. Int'l Conf. Parallel Processing*, Toronto, Canada, 21-24 August 2000, pp. 33-40.

**[185]** [2000f] [Conference paper] [PDF] [PS]

C.-H. Yeh, B. Parhami, E.A. Varvarigos, and H. Lee, "VLSI Layout and Packaging of Butterfly Networks,"
*Proc. 12th ACM Symp. Parallel Algorithms and Architectures*, Bar Harbor, Maine, 9-13 July 2000, pp. 196-205.

**[184]** [2000e] [Conference paper] [PDF]

B. Parhami and D.-M. Kwai, "Characterization and Generalization of Honeycomb and Diamond Networks,"
*Proc. Int'l Conf. Parallel and Distributed Processing Techniques and Applications*, Las Vegas, NV, 26-29 June 2000, pp. 2947-2951.

**[183]** [2000d] [Conference paper] [PDF]

B. Parhami, "Extended-Fault Diameter of Mesh Networks,"
*Proc. Int'l Conf. Parallel and Distributed Processing Techniques and Applications*, Las Vegas, NV, 26-29 June 2000, pp. 1035-1039.

**[182]** [2000c] [Conference paper] [PDF]

B. Parhami and C.-H. Yeh, "Why Network Diameter is Still Important,"
*Proc. Int'l Conf. Communications in Computing*, Las Vegas, NV, 26-29 June 2000, pp. 271-274.

**[181]** [2000b] [Conference paper] [PDF]

B. Parhami and D.-M. Kwai, "Challenges in Interconnection Network Design in the Era of Multiprocessor and Massively Parallel Microchips,"
*Proc. Int'l Conf. Communications in Computing*, Las Vegas, NV, 26-29 June 2000, pp. 241-246.

**[180]** [2000a] [Book supplement] [Website]

B. Parhami, *Instructor's Manual for Computer Arithmetic: Algorithms and Hardware Designs*,

Oxford University Press, New York, 2000.

Vol. 1: Problem Solutions, 154 + iv pp., ISBN: 0-19-513949-6, available from the publisher.

Vol. 2: Presentation Material (lecture slides and more), available via the book's website.

**[179]** [2000] [Book] [Website]

B. Parhami, *Computer Arithmetic: Algorithms and Hardware Designs*,

Oxford University Press, New York, 490 + xx pp., 2000, ISBN: 0-19-512583-5.

Instructor support material and errata available at the book's website; 2nd ed. of publication [179].

**[178]** [1999p] [Conference paper]

D.-M. Kwai and B. Parhami, "High-Performance Array Processing with Fully Pipelined Data Streams and Control Paths,"
*Proc. 11th Int'l Conf. Parallel and Distributed Computing and Systems*, Cambridge, MA, 3-6 November 1999, pp. 609-612.

**[177]** [1999o] [Conference paper]

C.-H. Yeh, E.A. Varvarigos, V. Sharma, and B. Parhami, "Scalable Communication Protocols for High-Speed Networks,"
*Proc. 11th Int'l Conf. Parallel and Distributed Computing and Systems*, Cambridge, MA, 3-6 November 1999, pp. 417-422.

**[176]** [1999n] [Conference paper]

D.-M. Kwai and B. Parhami, "Comparing Torus, Pruned Torus, and Manhattan Street Networks as Interconnection Architectures for Highly Parallel Computers,"
*Proc. 11th Int'l Conf. Parallel and Distributed Computing and Systems*, Cambridge, MA, 3-6 November 1999, pp. 19-22.

**[175]** [1999m] [Conference paper] [PDF]

C.-H. Yeh and B. Parhami, "Efficient Designs for Multi-Input Counters,"
*Proc. 33rd Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 24-27 October 1999, pp. 1340-1344.

**[174]** [1999l] [Conference paper] [PDF]

C.-H. Yeh, E.A. Varvarigos, B. Parhami, and H. Lee, "Optimal-Depth Threshold Circuits for Multiplication and Related Problems,"
*Proc. 33rd Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 24-27 October 1999, pp. 1331-1335.

**[173]** [1999k] [Conference paper] [PDF]

B. Parhami, "Analysis of the Lookup Table Size for Square-Rooting,"
*Proc. 33rd Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 24-27 October 1999, pp. 1327-1330.

**[172]** [1999j] [Conference paper] [PDF]

C.-H. Yeh and B. Parhami, "Routing and Embeddings in Cyclic Petersen Networks: An Efficient Extension of the Petersen Graph,"
*Proc. Int'l Conf. Parallel Processing*, Aizu, Japan, 21-24 September 1999, pp. 258-265.

**[171]** [1999i] [Conference paper] [PDF]

C.-H. Yeh and B. Parhami, "The Index-Permutation Graph Model for Hierarchical Interconnection Networks,"
*Proc. Int'l Conf. Parallel Processing*, Aizu, Japan, 21-24 September 1999, pp. 48-55.

**[170]** [1999h] [Book supplement] [Website]

B. Parhami, *Instructors Manual for Introduction to Parallel Processing: Algorithms and Architectures*,

Plenum Press, New York, 303 + vi pp., 1999.

Lecture slides available at the book's website.

**[169]** [1999g] [Journal article] [PDF] [Pinter's errors]

B. Parhami and D.-M. Kwai, "Periodically Regular Chordal Rings,"
*IEEE Trans. Parallel and Distributed Systems*, Vol. 10, No. 6, pp. 658-672, June 1999.

Printer's errors corrected in: Vol. 10, No. 7, pp. 767-768, July 1999.

**[168]** [1999f] [Journal article] [PDF]

D.-M. Kwai and B. Parhami, "Scalability of Programmable FIR Digital Filters,"
*J. VLSI Signal Processing*, Vol. 21, No. 1, pp. 31-35, May 1999.

**[167]** [1999e] [Conference paper] [PDF]

C.-H. Yeh, B. Parhami, and E. A. Varvarigos, "The Recursive Grid Layout Scheme for VLSI Layout of Hierarchical Networks,"
*Proc. Joint 13th Int'l Parallel Processing Symp. and 10th Symp. Parallel & Distributed Processing*, San Juan, Puerto Rico, 12-16 April 1999, pp. 441-445.

**[166]** [1999d] [Conference paper] [PDF]

C.-H. Yeh, B. Parhami, H. Lee, and E. A. Varvarigos, "2.5*n*-Step Sorting on *n* x *n* Meshes in the Presence of
*o*(*n*^{1/2}) Worst-Case Faults,"
*Proc. Joint 13th Int'l Parallel Processing Symp. and 10th Symp. Parallel & Distributed Processing*, San Juan, Puerto Rico, 12-16 April 1999, pp. 436-440.

**[165]** [1999c] [Invited book chapter] [PDF]

B. Parhami and D.-M. Kwai, "Combinational Circuits,"
*Encyclopedia of Electrical and Electronics Engineering*, Wiley, Vol. 3, pp. 562-570, 1999.

**[164]** [1999b] [Conference paper] [PS]

C.-H. Yeh, E.A. Varvarigos, and B. Parhami, "Efficient VLSI Layouts of Hypercubic Networks,"
*Proc. 7th Symp. Frontiers of Massively Parallel Computation*, Annapolis, MD, 21-25 February 1999, pp. 98-105.

**[163]** [1999a] [Journal article] [PDF]

B. Parhami and D.-M. Kwai, "Data-Driven Control Scheme for Linear Arrays: Application to a Stable Insertion Sorter,"
*IEEE Trans. Parallel and Distributed Systems*, Vol. 10, No. 1, pp. 23-28, January 1999.

**[162]** [1999] [Book] [Website]

B. Parhami, *Introduction to Parallel Processing: Algorithms and Architectures*,

Plenum Press, New York, 532 + xxi pp, 1999, ISBN: 0-306-45970-1 (e-book ISBN: 0-306-46964-2).

Instructor support material and errata available at the book's website; 2nd ed. of publication [179].

**[161]** [1998j] [Conference paper]

C.-H. Yeh and B. Parhami, "A New Representation of Graphs and Its Applications to Parallel Processing,"
*Proc. Int'l Conf. Parallel and Distributed Systems*, Tainan, Taiwan, 14-16 December 1998, pp. 702-709.

**[160]** [1998i] [Journal article] [PDF]

D.-M. Kwai and B. Parhami, "Pruned Three-Dimensional Toroidal Networks,"
*Information Processing Letters*, Vol. 68, No. 4, pp. 179-183, 30 November 1998.

**[159]** [1998h] [Journal article] [PDF]

C.-H. Yeh and B. Parhami, "VLSI Layouts of Complete Graphs and Star Graphs,"
*Information Processing Letters*, Vol. 68, No. 1, pp. 39-45, 15 October 1998.

**[158]** [1998g] [Conference paper]

D.-M. Kwai and B. Parhami, "Haar Transform with a Linear Processor Array Using a Data-Driven Control Scheme,"
*Proc. Int'l Conf. Signal & Image Processing*, Las Vegas, NV, 28-31 October 1998, pp. 166-168.

**[157]** [1998f] [Conference paper]

B. Parhami and D.-M. Kwai, "Applying Data-Driven Control to a Stable Sorter,"
*Proc. Int'l Conf. Signal & Image Processing*, Las Vegas, NV, pp. 134-136, 28-31 October 1998.

**[156]** [1998e] [Conference paper] [PDF]

B. Parhami and S. Johansson, "A Number Representation Scheme with Carry-Free Rounding for Floating-Point Signal Processing Applications,"
*Proc. Int'l Conf. Signal & Image Processing*, Las Vegas, NV, pp. 90-92, 28-31 October 1998.

**[155]** [1998d] [Conference paper]

C.-H. Yeh and B. Parhami, "Efficient VLSI Layouts of the Complete Graph, Star Graph, and Related Networks,"
*Proc. 10th Int'l Conf. Parallel and Distributed Computing and Systems*, Las Vegas, NV, 28-31 October 1998, pp. 427-432.

**[154]** [1998c] [Conference paper]

C.-H. Yeh and B. Parhami, "Synthesizing High-Performance Parallel Architectures under Inter-Module Bandwidth Constraints,"
*Proc. 10th Int'l Conf. Parallel and Distributed Computing and Systems*, Las Vegas, NV, 28-31 October 1998, pp. 414-416.

**[153]** [1998b] [Conference paper]

B. Parhamiand D.-M. Kwai, "Wormhole Routing on a Class of High-Performance Fixed-Degree Parallel Processor Networks,"
*Proc. 10th Int'l Conf. Parallel and Distributed Computing and Systems*, Las Vegas, NV, 28-31 October 1998, pp. 376-378.

**[152]** [1998a] [Conference paper] [PDF]

B. Parhami and C.-H. Yeh, "The Robust Algorithm Approach to Fault Tolerance on Processor Arrays: Fault Models, Fault Diameter, and Basic Algorithms,"
*Proc. Joint 12th Int'l Parallel Processing Symp. and 9th Symp. Parallel and Distributed Processing*, Orlando, FL, 30 March to 3 April 1998, pp. 742-746.

**[151]** [1998] [Journal article] [PDF]

D.-M. Kwai and B. Parhami, "Tight Bounds on the Diameter of Gaussian Cubes,"
*The Computer J.*, Vol. 41, No. 1, pp. 52-56, 1998.

**[150]** [1997k] [Journal article] [PDF]

B. Parhami, "Defect, Fault, Error, . . . , or Failure?,"
*IEEE Trans. Reliability*, Vol. 46, No. 4, pp. 450-451, December 1997.

**[149]** [1997j] [Invited journal article] [Read]

B. Parhami, "Introduction to the Special Issue Focusing on Computer Systems,"
*Scientia Iranica*, Vol. 3, No. 4, pp. vii-viii, Winter 1997.

**[148]** [1997i] [Book chapter]

B. Parhami, "Search and Data Selection Algorithms for Associative Processors,"

In *Associative Processing and Processors*, ed. by A. Krikelis and C. Weems, IEEE Computer Society Press, 1997, pp. 10-25.

**[147]** [1997h] [Journal article] [PDF]

B. Parhami, "A Note on Architectures for Large-Capacity CAMs,"
*Integration, the VLSI Journal*, Vol. 22, pp. 165-171, August 1997.

**[146]** [1997g] [Conference paper] [PDF]

D.-M. Kwai and B. Parhami, "A Class of Fixed-Degree Cayley-Graph Interconnection Networks Derived by Pruning *k*-ary *n*-cubes,"
*Proc. Int'l Conf. Parallel Processing*, 11-15 August 1997, pp. 92-95.

**[145]** [1997f] [Conference paper] [PDF]

C.-H. Yeh and B. Parhami, "Optimal Sorting Algorithms on Incomplete Meshes with Arbitrary Fault Patterns,"
*Proc. Int'l Conf. Parallel Processing*, 11-15 August 1997, pp. 4-11.

**[144]** [1997e] [Conference paper] [PDF]

D.-M. Kwai and B. Parhami, "A Vector Quantizer with Fully Pipelined Data and Control Flow,"
*Proc. 40th Midwest Symp. Circuits and Systems*, Sacramento, CA, 3-6 August 1997, Vol. 2, pp. 1057-1060.

**[143]** [1997d] [Conference paper] [PDF]

D.-M. Kwai and B. Parhami, "Area-Time Tradeoffs in FIR Digital Filters with Broadcast and Pipelined Designs,"
*Proc. 40th Midwest Symp. Circuits and Systems*, Sacramento, CA, 3-6 August 1997, Vol. 1, pp. 449-452.

**[142]** [1997c] [Conference paper] [PDF]

B. Parhami, "Modular Reduction by Multilevel Table Lookup,"
*Proc. 40th Midwest Symp. Circuits and Systems*, Sacramento, CA, 3-6 August 1997, Vol. 1, pp. 381-384.

**[141]** [1997b] [Conference paper] [PDF]

C.-H. Yeh and B. Parhami, "Cyclic Networks -- A Family of Versatile Fixed-Degree Interconnection Architectures,"
*Proc. 11th Int'l Parallel Processing Symp.*, Geneva, 1-5 April 1997, pp. 739-743.

**[140]** [1997a] [Journal article] [PDF]

D.-M. Kwai and B. Parhami, "An On-Line Fault Diagnosis Scheme for Linear Processor Arrays,"
*Microprocessors and Microsystems*, Vol. 20, No. 7, pp. 423-428, 17 March 1997.

**[139]** [1997] [Conference paper] [PDF]

C.-H. Yeh and B. Parhami, "Design of High-Performance Massively Parallel Architectures under Pin Limitations and Non-Uniform Propagation Delay,"
*Proc. 2nd Aizu Int'l Symp. Parallel Algorithms/Architecture Synthesis*, Aizu, Japan, 17-21 March 1997, pp. 58-65.

**[138]** [1996z] [Journal article] [PDF]

B. Parhami, "Parallel Threshold Voting,"
*The Computer J.*, Vol. 39, No. 8, pp. 692-700, 1996.

**[137]** [1996y] [Journal article]

D.-M. Kwai and B. Parhami, "A Generalization of Hypercubic Networks Based on Their Chordal Ring Structures,"
*Parallel Processing Letters*, Vol. 6, No. 4, pp. 469-477, 1996.

**[136]** [1996x] [Conference paper] [PDF]

B. Parhami, "Variations on Multi-Operand Addition for Faster Logarithmic-Time Tree Multipliers,"
*Proc. 30th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 3-6 November 1996, pp. 899-903.

**[135]** [1996w] [Conference paper] [PDF]

C.-H. Yeh and B. Parhami, "Efficient Pipelined Multi-Operand Adders with High Throughput and Low Latency: Designs and Applications,"
*Proc. 30th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 3-6 November 1996, pp. 894-898.

**[134]** [1996v] [Conference paper] [PDF]

S. Haynal and B. Parhami, "Arithmetic Structures for Inner-Product and Other Computations Based on a Latency-Free Bit-Serial Multiplier Design,"
*Proc. 30th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, 3-6 November 1996, pp. 197-201.

**[133]** [1996u] [Conference paper] [PDF]

B. Parhami, "Design of Reliable Software via General Combination of N-Version-Programming and Acceptance-Testing,"
*Proc. 7th Int'l Symp. on Software Reliability Engineering*, White Plains, NY, 30 October to 2 November 1996, pp. 104-109.

**[132]** [1996t] [Conference paper] [PDF]

C.-H. Yeh and B. Parhami, "Recursive Hierarchical Swapped Networks: Versatile Interconnection Architectures for Highly Parallel Systems," *Proc. 8th IEEE Symp. Parallel and Distributed Processing*, New Orleans, LA, 23-26 October 1996, pp. 453-460.

**[131]** [1996s] [Conference paper] [PDF]

D.-M. Kwai and B. Parhami, "Periodically Regular Chordal Rings: Generality, Scalability, and VLSI Layout,"
*Proc. of the 8th IEEE Symp. on Parallel and Distributed Processing*, New Orleans, LA, 23-26 October 1996, pp. 148-151.

**[130]** [1996r] [Journal article] [PDF]

D.-M. Kwai and B. Parhami, "FFT Computation with Linear Processor Arrays Using a Data-Driven Control Scheme,"
*J. VLSI Signal Processing*, Vol. 13, No. 1, pp. 57-66, August 1996.

**[129]** [1996q] [Journal article] [PDF]

B. Parhami, "A Note on Digital Filter Implementation Using Hybrid RNS-Binary Arithmetic,"
*Signal Processing*, Vol. 51, pp. 65-67, 1996.

**[128]** [1996p] [Conference paper] [PDF]

C.-H. Yeh and B. Parhami, "A Class of Parallel Architectures for Fast Fourier Transform,"
*Proc. 39th Midwest Symp. Circuits and Systems*, Ames, IA, pp. 856-859, 18-21 August 1996.

**[127]** [1996o] [Conference paper]

B. Parhami, "Numerical Computation on Massively Parallel Processors Based on Residue Number System Arithmetic,"
*Proc. Int'l Conf. Parallel and Distributed Processing Techniques and Applications*, Sunnyvale, CA, 9-11 August 1996, pp. 931-934.

**[126]** [1996n] [Conference paper]

C.-H. Yeh and B. Parhami, "Cyclic Petersen Networks -- Efficient Fixed-Degree Interconnection Networks for Large-Scale Multicomputer Systems,"
*Proc. Int'l Conf. Parallel and Distributed Processing Techniques and Applications*, Sunnyvale, CA, 9-11 August 1996, pp. 549-560.

**[125]** [1996m] [Conference paper]

C.-H. Yeh and B. Parhami, "Unified Formulation of a Wide Class of Scalable Interconnection Networks Based on Recursive Graphs,"
*Proc. 11th Int'l Conf. Systems Engineering*, Las Vegas, NV, 9-11 July 1996, pp. 491-496.

**[124]** [1996l] [Conference paper]

B. Parhami and D.-M. Kwai, "A Characterization of Symmetric Chordal Rings Using Redundant Number Representations,"
*Proc. 11th Int'l Conf. Systems Engineering*, Las Vegas, NV, 9-11 July 1996, pp. 467-472.

**[123]** [1996k] [Conference paper] [PDF]

C.-H. Yeh and B. Parhami, "Hierarchical Swapped Networks: Efficient Low-Degree Alternatives to Hypercubes and Generalized Hypercubes,"
*Proc. Int'l Symp. Parallel Architectures, Algorithms, and Networks*, Beijing, China, 12-14 June 1996, pp. 90-96.

**[122]** [1996j] [Conference paper] [PDF]

D.-M. Kwai and B. Parhami, "Fault-Tolerant Processor Arrays Using Space and Time Redundancy,"
*Proc. 2nd Int'l Conf. Algorithms and Architectures for Parallel Processing*, Singapore, 11-13 June 1996, pp. 303-310.

**[121]** [1996i] [Conference paper] [PDF]

B. Parhami, "Parallel Algorithms for *m*-out-of-*n* Threshold Voting,"
*Proc. 2nd Int'l Conf. Parallel Processing*, Singapore, 11-13 June 1996, pp. 225-232.

**[120]** [1996h] [Conference paper] [PDF]

C.-H. Yeh and B. Parhami, "Recursive Hierarchical Fully-Connected Networks: A Class of Low-Degree Small-Diameter Interconnection Networks,"
*Proc. 2nd Int'l Conf. Algorithms and Architectures for Parallel Processing*, Singapore, 11-13 June 1996, pp. 163-170.

**[119]** [1996g] [Conference paper] [PDF]

C.-H. Yeh and B. Parhami, "Swapped Networks: Unifying the Architectures and Algorithms of a Wide Class of Hierarchical Parallel Processors," *Proc. Int'l Conf. Parallel and Distributed Systems*, Tokyo, 3-6 June 1996, pp. 230-237.

**[118]** [1996f] [Journal article] [PDF]

B. Parhami, "A Taxonomy of Voting Schemes for Data Fusion and Dependable Computation,"
*Reliability Engineering and System Safety*, Vol. 52, No. 2, pp. 139-151, May 1996.

**[117]** [1996e] [Journal article] [PDF]

B. Parhami, "Comments on High-Speed Area-Efficient Multiplier Design Using Multiple-Valued Current Mode Circuits,"
*IEEE Trans. Computers*, Vol. 45, No. 5, pp. 637-638, May 1996.

**[116]** [1996d] [Conference paper]

C.-H. Yeh and B. Parhami, "Parallel Algorithms on Three-Level Hierarchical Cubic Networks,"
*High-Performance Computing '96: Grand Challenges in Computer Simulation*, New Orleans, LA, 8-11 April 1996, pp. 226-231.

**[115]** [1996c] [Journal article] [PDF]

B. Parhami, "Extreme-Value Search and General Selection Algorithms for Fully Parallel Associative Memories,"
*The Computer J.*, Vol. 39, No. 3, pp. 241-250, 1996.

**[114]** [1996b] [Conference paper]

C.-H. Yeh and B. Parhami, "Recursively Fully-Connected Networks: A Class of High-Performance Low-Degree Interconnection Networks,"
*Proc. 11th Int'l Conf. Computers and Their Applications*, San Francisco, CA, 7-9 March 1996, pp. 227-230.

**[113]** [1996a] [Conference paper] [PDF]

D.-M. Kwai and B. Parhami, "Comparing the Performance Parameters of Two Network Structures for Scalable Massively Parallel Processors,"
*Proc. 4th Int'l Workshop Modeling, Analysis and Simulation of Computer and Telecommunication Systems*, San Jose, CA, 1-3 February 1996, pp. 273-277.

**[112]** [1996] [Conference paper] [PDF]

B. Parhami, "Performance Analysis and Optimization of Search and Selection Algorithms for Highly Parallel Associative Memories,"
*Proc. 4th Int'l Workshop Modeling, Analysis and Simulation of Computer and Telecommunication Systems*, San Jose, CA, 1-3 February 1996, pp. 217-221.

**[111]** [1995i] [Conference paper]

B. Parhami, "On Lower Bounds for the Dimensions of Dot-Matrix Characters to Represent Farsi and Arabic Scripts,"
*Proc. 1st Annual CSI Computer Conf.*, Tehran, Iran, 25-28 December 1995, pp. 125-130.

**[110]** [1995h] [Conference paper]

B. Parhami, "Parallel Selection Algorithms for Associative Processors,"
*Proc. 1st Annual CSI Computer Conf.*, Tehran, Iran, 25-28 December 1995, pp. 41-46.

**[109]** [1995g] [Conference paper]

D.-M. Kwai and B. Parhami, "Periodically Regular Chordal Rings as Fault-Tolerant Loops,"
*Proc. Pacific Rim Int'l Symp. Fault-Tolerant Systems*, Newport Beach, CA, December 1995, pp. 210-215.

**[108]** [1995f] [Journal article] [PDF]

C. Y. Hung and B. Parhami, "Error Analysis of Approximate Chinese-Remainder-Theorem Decoding,"
*IEEE Trans. Computers*, Vol. 44, No. 11, pp. 1344-1348, November 1995.

**[107]** [1995e] [Conference paper] [PDF]

B. Parhami and C.-H. Yeh, "Accumulative Parallel Counters," *Proc. 29th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, October/November 1995, pp. 966-970.

**[106]** [1995d] [Conference paper] [PDF]

B. Parhami, "Multi-Sensor Data Fusion and Reliable Multi-Channel Computation: Unifying Concepts and Techniques,"
*Proc. 29th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, October/November 1995, pp. 745-749.

**[105]** [1995c] [Unrefereed journal article] [PDF]

B. Parhami, "SIMD Machines: Do They Have a Significant Future?" (printed in two different journals)
*IEEE Computer Society Technical Committee on Computer Architecture*, pp. 23-26, August 1995.
*Computer Architecture News*, Vol. 23, No. 4, pp. 19-22, September 1995.

**[104]** [1995b] [Unrefereed journal article]

B. Parhami, "Panel Assesses SIMDs Future,"
*IEEE Computer*, Vol. 28, No. 6, pp. 89-91, June 1995.

**[103]** [1995a] [Conference paper] [PDF]

B. Parhami and C. Y. Hung, "Robust Shearsort on Incomplete Bypass Meshes,"
*Proc. 9th Int'l Parallel Processing Symp.*, Santa Barbara, CA, April 1995, pp. 304-311.

**[102]** [1995] [Conference paper] [PDF]

B. Parhami, "Periodically Regular Chordal Ring Networks for Massively Parallel Architectures,"
*Proc. 5th Symp. Frontiers of Massively Parallel Computation*, McLean, VA, February 1995, pp. 315-322.

**[101]** [1994i] [Journal article] [PDF]

B. Parhami, "Voting Algorithms,"
*IEEE Trans. Reliability*, Vol. 43, No. 4, pp. 617-629, December 1994.

**[100]** [1994h] [Conference paper] [PDF]

B. Parhami, "Analysis of Tabular Methods for Modular Reduction,"
*Proc. 28th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, October/November 1994, pp. 526-530.

**[099]** [1994g] [Conference paper] [PDF]

B. Parhami, "Implementation Alternatives for Generalized Signed-Digit Addition,"
*Proc. 28th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, October/November 1994, pp. 157-161.

**[098]** [1994f] [Conference paper] [PDF]

B. Parhami and C. Y. Hung, "Optimal Table Lookup Schemes for VLSI Implementation of Input/Output Conversions and Other Residue Number Operations,"
*VLSI Signal Processing VII* (Proc. IEEE Workshop), La Jolla, CA, 26-28 October 1994, pp. 470-481.

**[097]** [1994e] [Journal article] [PDF]

C. Y. Hung and B. Parhami, "Fast RNS Division Algorithms for Fixed Divisors with Application to RSA Encryption,"
*Information Processing Letters*, Vol. 51, No. 4, pp. 163-169, 24 August 1994.

**[096]** [1994d] [Journal article] [PDF]

B. Parhami, "A Multi-Level View of Dependable Computing,"
*Computers & Electrical Engineering*, Vol. 20, No. 4, pp. 347-368, July 1994.

**[095]** [1994c] [Conference paper]

B. Parhami, "Optimal Timing Schemes for Head-per-Track Mass Memories in a Class of Massively Parallel Database Processors,"
*Proc. Iranian Conf. Electrical Engineering*, Tehran, May 1994.

**[094]** [1994b] [Journal article] [PDF]

B. Parhami, "Threshold Voting is Fundamentally Simpler than Plurality Voting,"
*International J. Reliability, Quality, and Safety Engineering*, Vol. 1, No. 1, pp. 95-102, March 1994.

**[093]** [1994a] [Journal article] [PDF]

B. Parhami, "Comments on Evaluation of *A* + *B* = *K* Conditions Without Carry Propagation,"
*IEEE Trans. Computers*, Vol. 43, No. 3, p. 381, March 1994.

**[092]** [1994] [Journal article] [PDF]

C. Y. Hung and B. Parhami, "An Approximate Sign Detection Method for Residue Numbers and Its Application to RNS Division,"
*Computers & Mathematics with Applications*, Vol. 27, No. 4, pp. 23-35, February 1994.

**[091]** [1993g] [Conference paper] [PDF]

B. Parhami, "Optimal Table-Lookup Schemes for Binary-to-Residue and Residue-to-Binary Conversions,"
*Proc. 27th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, November 1993, Vol. 1, pp. 812-816.

**[090]** [1993f] [Journal article] [PDF]

M. J. Serrano and B. Parhami, "Optimal Architectures and Algorithms for Mesh-Connected Parallel Computers with Separable Row/Column Buses," *IEEE Trans. Parallel and Distributed Systems*, Vol. 4, No. 10, pp. 1073-1080, October 1993.

**[089]** [1993e] [Conference paper] [PDF]

C. Y. Hung and B. Parhami, "Generalized Signed-Digit Multiplication and Its Systolic Realizations,"
*Proc. 36th Midwest Symp. Circuits and Systems*, Detroit, MI, August 1993, pp. 1505-1508.

**[088]** [1993d] [Conference paper] [PDF]

B. Parhami, "Fault Tolerance Properties of Mesh-Connected Parallel Computers with Separable Row/Column Buses,"
*Proc. 36th Midwest Symp. Circuits and Systems*, Detroit, MI, August 1993, pp. 1128-1131.

**[087]** [1993c] [Conference paper]

B. Parhami, "Average-Case-Optimal Maximum and Minimum Finding on Fully Parallel Associative Memories,"
*Proc. Associative Processing and Applications Workshop*, Syracuse, NY, July 1993, pp. 9-1 to 9-7.

**[086]** [1993b] [Journal article] [PDF]

B. Parhami, "On the Implementation of Arithmetic Support Functions for Generalized Signed-Digit Number Systems,"
*IEEE Trans. Computers*, Vol. 42, No. 3, pp. 379-384, March 1993.

**[085]** [1993a] [Journal article] [PDF]

B. Parhami and H.-F. Lai, "Alternate Memory Compression Schemes for Modular Multiplication,"
*IEEE Trans. Signal Processing*, Vol. 41, No. 3, pp. 1378-1385, March 1993.

**[084]** [1993] [Conference paper] [PDF]

B. Parhami and C. Y. Hung, "Scheduling of Replicated Tasks to Meet Correctness Requirements and Deadlines,"
*Proc. 26th Hawaii Int'l Conf. System Sciences*, Vol. 2, pp. 506-515, January 1993.

**[083]** [1992d] [Journal article]

B. Parhami, "Architectural Tradeoffs in the Design of VLSI-Based Associative Memories,"
*Microprocessing and Microprogramming*, Vol. 36, No. 1, pp. 27-41, November 1992.

**[082]** [1992c] [Journal article] [PDF]

B. Parhami, "Systolic Number Radix Converters,"
*The Computer J.*, Vol. 35, No. 4, pp. 405-409, August 1992.

**[081]** [1992b] [Conference paper]

B. Parhami, "Flexible Massively Parallel Arithmetic on Associative Processors" (Extended Abstract)
*Proc. Associative Processing and Applications Workshop*, Syracuse, NY, July 1992, pp. 16-1 to 16-8.

**[080]** [1992a] [Conference paper] [PDF]

B. Parhami, "Optimal Algorithms for Exact, Inexact, and Approval Voting,"
*Proc. 22nd Int'l Symp. Fault-Tolerant Computing*, Boston, July 1992, pp. 404-411.

**[079]** [1992] [Conference paper] [PDF]

M. J. Serrano and B. Parhami, "Optimal Aspect Ratio and Number of Separable Row/Column Buses for Mesh-Connected Parallel Computers,"
*Proc. 6th Int'l Parallel Processing Symp.*, Beverly Hills, CA, March 1992, pp. 343-347.

**[078]** [1991g] [Conference paper] [PDF]

B. Parhami, "Design of *m*-out-of-*n* Bit-Voters,"
*Proc. 25th Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, November 1991, Vol. 2, pp. 1260-1264.

**[077]** [1991f] [Conference paper] [PDF]

B. Parhami, "New Classes of Unidirectional Error-Detecting Codes,"
*Proc. Int'l Conf. Computer Design*, Cambridge, MA, October 1991, pp. 574-577.

**[076]** [1991e] [Conference paper]

B. Parhami, "The Parallel Complexity of Weighted Voting,"
*Proc. International Conf. Parallel and Distributed Computing and Systems*, Washington, DC, October 1991, pp. 382-385.

**[075]** [1991d] [Journal article] [PDF]

B. Parhami, "Voting Networks,"
*IEEE Trans. Reliability*, Vol. 40, No. 3, pp. 380-394, August 1991.

**[074]** [1991c] [Book chapter]

B. Parhami, "Scalable Architectures for VLSI-Based Associative Memories,"

In *Parallel Architectures*, ed. by N. Rishe, S. Navathe, and D. Tal, IEEE Computer Society Press, 1991, pp. 181-200.

**[073]** [1991b] [Conference paper] [PDF]

B. Parhami, "High-Performance Parallel Pipelined Voting Networks,"
*Proc. 5th Int'l Parallel Processing Symp.*, Anaheim, CA, April/May 1991, pp. 491-494.

**[072]** [1991a] [Book chapter]

B. Parhami, "A Data-Driven Dependability Assurance Scheme with Applications to Data and Design Diversity,"

In *Dependable Computing for Critical Applications* (Dependable Computing and Fault-Tolerant Systems, Vol. 4), Springer-Verlag, Wien, 1991, pp. 257-282.

**[071]** [1991] [Conference paper] [PDF]

B. Parhami, "The Mixed Serial/Parallel Approach to VLSI Search Processors,"
*Proc. 24th Hawaii Int'l Conf. System Sciences*, Minitrack on Associative Processing, Koloa, Hawaii, January 1991, Vol. I, pp. 202-211.

**[070]** [1990d] [Conference paper]

B. Parhami, "Systolic Associative Memories,"
*Proc. Int'l Conf. Parallel Processing*, St. Charles, IL, August 1990, Vol. I, pp. I-545 to I-548.

**[069]** [1990c] [Conference paper]

B. Parhami, "A Unified Approach to Correctness and Timeliness Requirements for Ultrareliable Concurrent Systems,"
*Proc. 4th Int'l Parallel Processing Symp.*, Fullerton, CA, April 1990, pp. 733-747.

**[068]** [1990b] [Conference paper]

B. Parhami, "Massively Parallel Search Processors: History and Modern Trends,"
*Proc. 4th Int'l Parallel Processing Symp.*, Fullerton, CA, April 1990, pp. 91-104.

**[067]** [1990a] [Conference paper] [PDF]

B. Parhami, "Associative Memory Designs for VLSI Implementation,"
*Proc. Int'l Conf. on Databases, Parallel Architectures, and Their Applications*, Miami, FL, March 1990, pp. 359-366.

**[066]** [1990] [Journal article] [PDF]

B. Parhami, "Generalized Signed-Digit Number Systems: A Unifying Framework for Redundant Number Representations,"
*IEEE Trans. Computers*, Vol. 39, No. 1, pp. 89-98, January 1990.

**[065]** [1989g] [Journal article] [PDF]

B. Parhami, "Optimal Number of Disk Clock Tracks for Block-Oriented Rotating Associative Processors,"
*IEE Proceedings Part E: Computers and Digital Techniques*, Vol. 136, No. 6, pp. 535-538, November 1989.

**[064]** [1989f] [Conference paper] [PDF]

B. Parhami, "A Framework for the Study of Computer System Dependability,"
*Proc. 23rd Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, October/November 1989, pp. 1017-1021.

**[063]** [1989e] [Conference paper] [PDF]

B. Parhami, "Parallel Counters for Signed Binary Signals," *Proc. 23rd Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, October/November 1989, pp. 513-516.

**[062]** [1989d] [Conference paper]

B. Parhami, "A Data-Driven Dependability Assurance Scheme with Applications to Data and Design Diversity,"
*Proc. IFIP Int'l Working Conf. Dependable Computing for Critical Applications*, Santa Barbara, CA, August 1989, pp. 105-112.

**[061]** [1989c] [Conference paper] [PDF]

B. Parhami, "Optimal Universal Logic Modules for the Synthesis of Arbitrary Logic Functions,"
*Proc. 32nd Midwest Symp. Circuits and Systems*, Champaign, IL, August 1989, pp. 212-215.

**[060]** [1989b] [Conference paper] [PDF]

B. Parhami, "A New Paradigm for the Design of Dependable Systems,"
*Proc. Int'l Symp. Circuits and Systems*, Portland, OR, May 1989, pp. 561-564.

**[059]** [1989a] [Journal article]

B. Parhami, "Minimal Multiplexer Realization of Logic Functions,"
*Canadian Electrical and Computer Engineering J.*, Vol. 14, No. 2, pp. 67-71, April 1989.

**[058]** [1989] [Conference paper]

B. Parhami, "A New Method for Designing Highly Parallel Binary Multipliers,"
*Proc. 3rd Int'l Parallel Processing Symp.*, Fullerton, CA, March 1989, pp. 176-185.

**[057]** [1988e] [Conference paper]

B. Parhami and F. Mavaddat, "Design for Testability through the Enhancement of Controllabilities and Observabilities of Register Transfer Specifications,"
*Proc. Canadian Conf. Electrical and Computer Engineering*, Vancouver, BC, November 1988, pp. 385-388.

**[056]** [1988d] [Journal article] [PDF]

B. Parhami, "Carry-Free Addition of Recoded Binary Signed-Digit Numbers,"
*IEEE Trans. Computers*, Vol. 37, No. 11, pp. 1470-1476, November 1988.

**[055]** [1988c] [Conference paper] [PDF]

B. Parhami, "Zero, Sign, and Overflow Detection Schemes for Generalized Signed-Digit Arithmetic,"
*Proc. 22nd Asilomar Conf. Signals, Systems, and Computers*, Pacific Grove, CA, October/November 1988, pp. 636-639.

**[054]** [1988b] [Journal article] [PDF]

F. Mavaddat and B. Parhami, "URISC: The Ultimate Reduced Instruction Set Computer,"
*International J. Electrical Engineering Education*, Vol. 25, No. 4, pp. 327-334, October 1988.

**[053]** [1988a] [Unrefereed journal article] [PDF]

B. Parhami, "From Defects to Failures: A View of Dependable Computing,"
*Computer Architecture News*, Vol. 16, No. 4, pp. 157-168, September 1988.

**[052]** [1988] [Conference paper]

B. Parhami, "Conversions Between Generalized Signed-Digit and Conventional Number Representations,"
*Proc. 2nd Int'l Parallel Processing Symp.*, Fullerton, CA, April 1988, pp. 95-106.

**[051]** [1987b] [Conference paper]

B. Parhami, "A General Theory of Carry-Free and Limited-Carry Computer Arithmetic,"
*Proc. Canadian Conf. VLSI*, Winnipeg, Canada, October 1987, pp. 167-172.

**[050]** [1987a] [Journal article] [PDF]

B. Parhami, "On the Complexity of Table Look-Up for Iterative Division,"
*IEEE Trans. Computers*, Vol. 36, No. 10, pp. 1233-1236, October 1987.

**[049]** [1987] [Conference paper]

B. Parhami, "Systolic Up/Down Counters with Zero and Sign Detection,"
*Proc. 8th Symp. Computer Arithmetic*, Como, Italy, May 1987, pp. 174-178.

**[048]** [1986a] [Unrefereed journal article] [PDF]

B. Parhami, "A Geometric View of Mutual Exclusion and Deadlock in Computer Systems,"
*ACM SIGCSE Bulletin*, Vol. 18, No. 4, pp. 2-5, December 1986.

**[047]** [1986] [Journal article]

B. Parhami, "Computer Science and Engineering Education in a Developing Country: The Case of Iran,"
*Education and Computing*, Vol. 2, No. 4, pp. 231-242, 1986.

**[046]** [1985] [Conference paper]

B. Parhami, "University Education in Computer Science and Technology: The New Iranian Plan,"
*Proc. IFIP 4th World Conf. on Computers in Education*, Norfolk, VA, August 1985, pp. 923-930.

**[045]** [1984c] [Journal article]

B. Parhami, "Standard Farsi Information Interchange Code and Keyboard Layout: A Unified Proposal,"
*J. Institution of Electrical and Telecommunications Engineers*, Vol. 30, No. 6, pp. 179-183, 1984.

**[044]** [1984b] [Book] [Website]

B. Parhami, *Computer Appreciation* (*Aashnaaee baa Computer*, in Persian),

Tehran, 210 + x pp., 1984. Reprinted in 1985, 1987, and yearly thereafter. As of 2001, was still being used as a textbook.

**[043]** [1984a] [Conference paper]

B. Parhami, "Developments in Dataflow Computer Architecture,"
*Proc. 15th National Iranian Mathematics Conf.*, Shiraz, March 1984.

**[042]** [1984] [Invited conference paper]

B. Parhami, "Why Networking?: An Introduction to the Concepts, Terminology, Architecture, and Applications of Computer Networks," *Proc. UNESCO Workshop Standardization and Modalities of Exchange from the Network Point of View*, Tehran, February 1984, pp. 1-27.

**[041]** [1981c] [Journal article] [PDF]

B. Parhami and M. Taraghi, "Automatic Recognition of Printed Farsi Texts,"
*Pattern Recognition*, Vol. 14, Nos. 1-6, pp. 395-403, 1981.

**[040]** [1981b] [Book] [Website]

B. Parhami and V. Daie, *Glossary of Computers and Informatics: English/Persian*,

Informatics Society of Iran, Tehran, May 1981.

Reprinted many times up to 1991; revised and reissued by an ISI committee in 1994.

**[039]** [1981a] [Conference paper]

B. Parhami and K. Alvandi, "Application of a Minicomputer for Direct Numerical Control of Multiple Machine Tools,"
*System Approach for Development* (Proc. IFAC Conf.), North-Holland, Amsterdam, 1981, pp. 231-236.

**[038]** [1981] [Conference paper]

B. Parhami, "Language-Dependent Considerations for Computer Applications in Farsi and Arabic Speaking Countries,"
*System Approach for Development* (Proc. IFAC Conf.), North-Holland, Amsterdam, 1981, pp. 507-513.

**[037]** [1980] [Conference paper]

B. Parhami and M. Taraghi, "Automatic Recognition of Printed Farsi Texts" (summary),
*Proc. Conf. Pattern Recognition*, Oxford, England, January 1980.

**[036]** [1979b] [Journal article]

B. Parhami, "Interconnection Redundancy for Reliability Enhancement in Fault-Tolerant Digital Systems,"
*Digital Processes*, Vol. 5, Nos. 3-4, pp. 199-211, 1979.

**[035]** [1979a] [Journal article] [PDF]

F. Mavaddat and B. Parhami, "A Data Structure for Family Relations,"
*The Computer J.*, Vol. 22, No. 2, pp. 110-113, May 1979.

**[034]** [1979] [Journal article]

B. Parhami, "An Introduction to Placement and Routing Techniques in Computer-Aided Design of Printed Circuit Boards,"
*Bull. Iranian Mathematical Society*, No. 10, pp. 18L-30L, Fall 1978 & Winter 1979.

**[033]** [1978g] [Conference paper]

B. Parhami, "On the Use of Farsi and Arabic Languages in Computer-Based Information Systems,"
*Proc. Symp. Linguistic Implications of Computer-Based Information Systems*, New Delhi, India, November 1978.

**[032]** [1978f] [Conference paper]

B. Parhami, "Optically Weighted Dot-Matrix Farsi and Arabic Numerals,"
*Information Technology 78* (Proc. 3rd Jerusalem Conf.), August 1978, North-Holland, pp. 207-210.

**[031]** [1978e] [Conference paper]

B. Parhami, "Fault-Tolerant Digital System Hardware: Introduction and Overview,"
*Proc. Int'l Conf. Measurement and Control*, Athens, Greece, June 1978, pp. 883-889.

**[030]** [1978d] [Conference paper]

B. Parhami, "Totally Self-Checking Peripheral Circuits for Associative Devices" (Short Paper),
*Proc. 8th Int'l Symp. Fault-Tolerant Computing*, Toulouse, France, June 1978, p. 223.

**[029]** [1978c] [Conference paper]

B. Parhami, "Placement and Routing Techniques in Computer-Aided Design" (Extended Summary),
*Proc. Symp. Computer-Aided Design*, Tehran, Iran, May 1978, pp. 1-3-a to 1-3-e.

**[028]** [1978b] [Journal article] [PDF]

B. Parhami and A. Avizienis, "Detection of Storage Errors in Mass Memories Using Arithmetic Error Codes,"
*IEEE Trans. Computers*, Vol. 27, No. 4, pp. 302-308, April 1978.

**[027]** [1978a] [Journal article]

B. Parhami, "Errors in Digital Computers: Causes and Cures," *Australian Computer Bulletin*, Vol. 2, No. 2, pp. 7-12, March 1978.

**[026]** [1978] [Conference paper]

B. Parhami, "An Introduction to the Geometry of Digital Pictures,"
*Proc. 9th National Mathematics Conf.*, Esfahan, March 1978, pp. 287-293.

**[025]** [1977f] [Journal article] [PDF]

B. Parhami, "Optimal Placement of Spare Modules in a Cascaded Chain,"
*IEEE Trans. Reliability*, Vol. 26, No. 4, pp. 280-282, October 1977.

**[024]** [1977e] [Conference paper]

F. Mavaddat and B. Parhami, "Informatics in Iran: Problems and Prospects,"
*Proc. Int'l Conf. Computer Applications in Developing Countries*, Bangkok, Thailand, August 1977, pp. 121-133.

**[023]** [1977d] [Conference paper]

B. Parhami and F. Mavaddat, "Computers and the Farsi Language: A Survey of Problem Areas,"
*Information Processing 77* (Proc. IFIP World Congress), North-Holland, Amsterdam, 1977, pp. 673-676.

**[022]** [1977c] [Conference paper]

B. Parhami, "The Concept of Self-Checking Programs" (Short Paper),
*Digest 7th Int'l Symp. Fault-Tolerant Computing*, Los Angeles, CA, June 1977, p. 216.

**[021]** [1977b] [Conference paper]

B. Parhami, "An Analysis of the First Two Moves in the Game of Mastermind" (in Persian, with English summary),
*Proc. 1st Iranian Statistics Conf.*, Tehran, April 1977.

**[020]** [1977a] [Conference paper]

M. J. Ashjaee and B. Parhami, "An Introduction to the Mathematical Aspects of Computer System Reliability,"
*Proc. 8th National Mathematics Conf.*, Tehran, Iran, March 1977, pp. 267-301.

**[019]** [1977] [Journal article]

B. Parhami, "Stochastic Finite Automata: A Tutorial and Literature Survey,"
*Bull. Iranian Mathematical Society*, No. 5, pp. 49-83, Winter 1977.

**[018]** [1976d] [Conference paper]

B. Parhami, "Low-Cost Output Displays for Microcomputer Applications,"
*Proc. 2nd Symp. Computer Architecture and System Design*, New Delhi, India, November 1976, pp. 111-119.

**[017]** [1976c] [Journal article]

F. Mavaddat and B. Parhami, "Two-Level Associative Memory Organization for Table Look-Up Applications,"
*Revue Francaise dAutomatique et Informatique*, Vol. 10, No. 9, pp. 31-40, September 1976.

**[016]** [1976b] [Conference paper]

B. Parhami, "Low-Cost Residue Number Systems for Computer Arithmetic,"
*AFIPS Conf. Proc.*, Vol. 45 (National Computer Conf.), AFIPS Press, 1976, pp. 951-956.

**[015]** [1976a] [Conference paper]

B. Parhami, "Design of Self-Monitoring Circuits for Application in Fault-Tolerant Digital Systems,"
*Proc. Int'l Symp. Circuits and Systems*, Munich, Germany, April 1976, pp. 57-60.

**[014]** [1976] [Conference paper]

B. Parhami, "A Class of Residue Number Representation Systems,"
*Proc. 7th National Mathematics Conf.*, Tabriz, Iran, March 1976, pp. 263-367.

**[013]** [1975c] [Conference paper]

B. Parhami, "Synthesis of Self-Checking Digital Systems,"
*Proc. 5th Iranian Conf. Electrical Engineering*, Shiraz, October 1975, pp. 1476-1499.

**[012]** [1975b] [Conference paper]

B. Parhami, "Modeling of Tradeoffs in Fault-Tolerant Homogeneous Array Processors,"
*Digest 5th Int'l Symp. Fault-Tolerant Computing*, Paris, pp. 93-97, June 1975.

**[011]** [1975a] [Conference paper] [PDF]

B. Parhami, "Application of APL for Rapid Verification of a Digital System Architecture,"
*Proc. APL Congress*, Pisa, Italy, June 1975, pp. 257-264.

**[010]** [1975] [Conference paper]

B. Parhami, "Associative Devices and Their Application in the Processing of Information,"
*Proc. 11th Conf. Statistics and Computational Science*, Cairo, Egypt, April 1975, Vol. 2, pp. 57-66.

**[009]** [1974b] [Unrefereed journal article]

B. Parhami, "On Cost/Reliability Tradeoffs in a Class of Fault-Tolerant Array Processors,"
*UCLA Computer Science Department Quarterly*, Vol. 2, No. 3, pp. 69-77, July 1974.

**[008]** [1974a] [Conference paper]

A. Avizienis and B. Parhami, "A Fault-Tolerant Parallel Computer System for Signal Processing,"
*Digest 4th Int'l Symp. Fault-Tolerant Computing*, Champaign, IL, June 1974, pp. 2-8 to 2-13.

**[007]** [1974] [Conference paper]

B. Parhami and A. Avizienis, "A Study of Fault Tolerance Techniques for Associative Processors,"
*AFIPS Conf. Proc.*, Vol. 43 (National Computer Conf.), AFIPS Press, 1974, pp. 643-652.

**[006]** [1973c] [Conference paper] [PDF]

B. Parhami and A. Avizienis, "Design of Fault-Tolerant Associative Processors,"
*Proc. 1st Annual Symp. Computer Architecture*, Gainesville, FL, December 1973, pp. 141-145.

**[005]** [1973b] [Conference paper]

B. Parhami, "Storing Extensible Tables in Associative Memories with Fixed Word Lengths,"
*Proc. 7th Asilomar Conf. Circuits, Systems, and Computers*, Pacific Grove, CA, November 1973, pp. 439-443.

**[004]** [1973a] [Journal article] [PDF]

B. Parhami, "Associative Memories and Processors: An Overview and Selected Bibliography,"
*Proceedings of the IEEE*, Vol. 61, No. 6, pp. 722-730, June 1973.

**[003]** [1973] [Conference paper]

B. Parhami and A. Avizienis, "Application of Arithmetic Error Codes for Checking of Mass Memories,"
*Digest 3rd Int'l Symp. Fault-Tolerant Computing*, Palo Alto, CA, June 1973, pp. 47-51.

**[002]** [1972a] [Conference paper]

B. Parhami, "A Highly Parallel Computing System for Information Retrieval,"
*AFIPS Conf. Proc.*, Vol. 41 (Fall Joint Computer Conf.), AFIPS Press, 1972, pp. 681-690.

**[001]** [1972] [Journal article] [PDF]

B. Parhami, "Stochastic Automata and the Problems of Reliability in Sequential Machines,"
*IEEE Trans. Computers*, Vol. 21, No. 4, pp. 388-391, April 1972.