Research Interests

• Computer Architecture

• Electronic Design Automation

• Machine Learning

Education

• Ph.D., Electrical & Computer Engineering, University of California Santa Barbara, 08/2014 - 06/2016
  Advisor: Prof. Yuan Xie

• Ph.D., Computer Science & Engineering, The Pennsylvania State University, 08/2011 - 08/2014
  Advisor: Prof. Yuan Xie

• M.S., Electronic Engineering, Tsinghua University, 08/2008 - 07/2011
  Advisor: Prof. Weibei Dou

• B.Eng. Electronic Engineering, Tsinghua University, 08/2004 - 07/2008
  

Conference Publications

• Liu Liu, Ping Chi, Shuangchen Li, Yuanqing Cheng, Yuan Xie. Building Energy-Efficient Multi-Level Cell STT-RAM Caches with Data Compression. Accepted by the 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2017, Chiba/Tokyo, Japan. (To appear.).
• Yu Ji, Youhui Zhang, Shuangchen Li, Ping Chi, Cihang Jiang, Peng Gu, Yuan Xie, Wenguang Chen. NEUTRAMS: Neural Network Transformation and Co-design under Neuromorphic Hardware Constraints. Accepted by the 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct. 2016, Taipei, Taiwan. (To appear.).
• Ping Chi, Shuangchen Li (equal contribution), Cong Xu, Tao Zhang, Jishen Zhao, Yongpan Liu, Yu Wang, and Yuan Xie. PRIME: A Novel Processing-in-memory Architecture for Neural Network Computation in ReRAM-based Main Memory. In Proceedings of the 43rd International Symposium on Computer Architecture (ISCA), June 2016, Seoul, Korea.
• Ping Chi, Shuangchen Li, Yuanqing Cheng, Yu Lu, Seung H. Kang, and Yuan Xie. Architecture Design with STT-RAM: Opportunities and Challenges. In Proceedings of Asia and South Pacific Design Automation Conference (ASP-DAC), Jan., 2016. Invited paper.
• Shuangchen Li, Ping Chi, Jishen Zhao, Kwang-Ting Cheng, and Yuan Xie. Leveraging Nonvolatility for Architecture Design with Emerging NVM. In Proceedings of Non-Volatile Memory System and Applications Symposium (NVMSA), Aug., 2015. Invited paper.
• Ping Chi, Cong Xu, Tao Zhang, Xiangyu Dong, and Yuan Xie. Using Multi-Level Cell STT-RAM for Fast and Energy-Efficient Local Checkpointing. In Proceedings of the International Conference on Computer-Aided Design (ICCAD), Nov. 2014, San Jose, USA. (Best Paper Award - Front End.)
• Ping Chi, and Yuan Xie. Facilitating PCRAM and STT-RAM as Next-Generation Memories: Architecture-level and Application-level Perspectives. In ACM Student Research Competition at ICCAD, Poster, Nov. 2014, San Jose, USA.
• Ping Chi, Wang-Chien Lee, and Yuan Xie. Making B+-tree Efficient in PCM-Based Main Memory. In Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), Aug. 2014, La Jolla, USA.
• Ping Chi, Cong Xu, Tao Zhang, and Yuan Xie. Using Multi-Level Cell STT-RAM for Efficient Local Checkpointing. In Design Automation Conference (DAC), Work-in-Progress Poster, Jun. 2014, San Francisco, USA.
• Ping Chi, Cong Xu, Xiaochun Zhu, and Yuan Xie. Building Energy-Efficient Multi-Level Cell STT-MRAM Based Cache Through Dynamic Data-Resistance Encoding. In Proceedings of the International Symposium on Quality Electronic Design (ISQED), Mar. 2014, Santa Clara, USA.

Journal Publications

• Ping Chi, Wang-Chien Lee, and Yuan Xie. Adapting B+-Tree for Emerging Non-volatile Memory Based Main Memory. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 35, no. 9, pp. 1461-1474, Sep. 2016.
• Jishen Zhao, Cong Xu, Ping Chi, and Yuan Xie. Memory and storage system design with nonvolatile memory technologies. In IPSJ Transactions on System LSI Design Methodology (TSLDM), Vol.8, pp.2-11, 2015. Invited paper.

Professional Services

PC Member
• IEEE International Conference on Computer Design (ICCD), 2016
• International Symposium on Quality Electronic Design (ISQED), 2017

Journal Reviewer
• ACM Journal on Emerging Technologies in Computing Systems (JETC)
• ACM Transactions on Design Automation of Electronic Systems (TODAES)
• IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)
• IEEE Transactions on Very Large Scale Integrated Systems (TVLSI)
• Journal of System Architecture (JSA)

Awards and Honors

Teaching

• TA for PSU CMPSC/MATH 451 "Numerical Computations", Fall 2011

• TA for THU EE Dept. "Experiments and Designs of Signal Processing", Fall 2009 and Fall 2010

Courses