List of Publications

      


Behrooz Parhami: 2007/06/19 ||  E-mail: parhami@ece.ucsb.edu  ||  Problems: webadmin@ece.ucsb.edu

Other contact info at: Bottom of this page  ||  Go up to: B. Parhami's CV or his home page

      

On June 19, 2007, Professor Parhami's UCSB ECE website moved to a new location. For an up-to-date version of this page, visit it at the new address: http://www.ece.ucsb.edu/~parhami/publications.htm

All journal papers, conference papers, workshop papers, and book chapters in the following list are refereed, unless otherwise noted. Excluded from the list are 100+ original articles and limited-circulation manuscripts, 50+ published critical reviews (such as book or paper reviews in Computer, Computer Architecture News, and Mathematical Reviews), 160+ technical presentations (conferences, seminars, public speeches, mass media programs, short courses), 20+ course notes and readers, 70+ reports and proposals, 90+ technical translations and adaptations, and numerous technical correspondence items and short topical contributions to scientific periodicals. See Appendices to B. Parhami’s CV for details.

     

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Item Year Title and Co-Authors Publication or Publisher  (Link) Category
1 1972 “Stochastic Automata and the Problems of Reliability in Sequential Machines”. IEEE Transactions on Computers, Vol. 21, No. 4, pp. 388-391, April 1972.  Journal paper
2 1972a  “A Highly Parallel Computing System for Information Retrieval”.  AFIPS Conf. Proc., Vol. 41 (Fall Joint Computer Conf.), AFIPS Press, pp. 681-690, 1972. Conference paper
3 1973 “Application of Arithmetic Error Codes for Checking of Mass Memories”, B. Parhami and A. Avizienis. Digest of the Third International Symp. on Fault-Tolerant Computing, Palo Alto, CA, pp. 47-51, June 1973. Conference paper
4 1973a “Associative Memories and Processors: An Overview and  Selected Bibliography”. Proceedings of the IEEE, Vol. 61, No. 6, pp. 722-730, June 1973. Journal paper
5 1973b “Storing Extensible Tables in Associative Memories with Fixed Word Lengths”. Proc. of the Seventh Asilomar Conf. on Circuits, Systems, and Computers, Pacific Grove, CA, pp. 439-443, November 1973. Conference paper
6 1973c “Design of Fault-Tolerant Associative Processors”, B. Parhami and A. Avizienis. Proc. of the First Annual Symp. on Computer Architecture, Gainesville, FL, pp. 141-145, December 1973. (pdf_file) Conference paper
7 1974 “A Study of Fault Tolerance Techniques for Associative Processors”, B. Parhami and A. Avizienis. AFIPS Conf. Proc., Vol. 43 (National Computer Conf.), AFIPS Press, pp. 643-652, 1974. Conference paper
8 1974a “A Fault-Tolerant Parallel Computer System for Signal Processing”, A. Avizienis and B. Parhami. Digest of the Fourth International Symp. on Fault-Tolerant Computing, Champaign, IL, pp. 2-8 to 2-13, June 1974. Conference paper
9 1974b “On Cost/Reliability Tradeoffs in a Class of Fault-Tolerant Array Processors”. UCLA Computer Science Dept. Quarterly, Univ. of California, Los Angeles, Vol. 2, No. 3, pp. 69-77, July 1974. Journal paper, unrefereed
10 1975 “Associative Devices and Their Application in the Processing of  Information”. Proc. of the 11th Conf. on Statistics and Computational Science, Cairo, Egypt, Vol. 2, pp. 57-66, April 1975. Conference paper
11 1975a “Application of APL for Rapid Verification of a Digital System Architecture”. Proc. of APL Congress, Pisa, Italy, pp. 257-264, June 1975. (pdf_file) Conference paper
12 1975b  “Modeling of Tradeoffs in Fault-Tolerant Homogeneous Array Processors”. Digest of the Fifth International Symp. on Fault-Tolerant Computing, Paris, pp. 93-97, June 1975. Conference paper
13 1975c “Synthesis of Self-Checking Digital  Systems”. Proc. of the Fifth Iranian Conf. on Electrical Engineering, Shiraz, pp. 1476-1499, October 1975. Conference paper
14 1976 “A Class of Residue Number Representation Systems”. Proc. of the Seventh National Mathematics Conf., Tabriz, Iran, pp. 263-267, March 1976. Conference paper
15 1976a “Design of Self-Monitoring Circuits  for Application in Fault-Tolerant Digital Systems”. Proc. of the International Symp. on Circuits and Systems, Munich, Germany, pp. 57-60, April 1976. Conference paper
16 1976b “Low-Cost Residue Number Systems for Computer Arithmetic”. AFIPS Conf. Proc., Vol. 45 (National Computer Conf.), AFIPS Press, pp. 951-956,  1976. Conference paper
17 1976c “Two-Level Associative Memory  Organization for Table Look-Up Applications”, F. Mavaddat and B. Parhami. Revue Francaise d’Automatique et Informatique, Vol. 10, No. 9, pp. 31-40, September 1976. Journal paper
18 1976d  “Low-Cost Output Displays for Microcomputer Applications”. Proc. of the Second Symp. on Computer Architecture and System Design, New Delhi, India, pp. 111-119, November 1976. Conference paper
19 1977 “Stochastic Finite Automata: A Tutorial and Literature Survey”.  Bulletin of the Iranian Mathematical Society, No. 5, pp. 49-83, Winter 1977. Journal paper
20 1977a “An Introduction to the Mathematical Aspects of Computer System  Reliability”, M.J. Ashjaee and B. Parhami. Proc. of the Eighth National Mathematics Conf., Tehran, Iran, pp. 267-301, March 1977. Conference paper
21 1977b “An Analysis of the First Two Moves in the Game of Mastermind” (in Persian, with English summary). Proc. of the First Iranian Statistics Conf., Tehran, April 1977. Conference paper
22 1977c “The Concept of Self-Checking Programs” (Short Paper). Digest of the Seventh International Symp. on Fault-Tolerant Computing, Los Angeles, CA, p. 216, June 1977. Conference paper
23 1977d “Computers and the Farsi Language:  A Survey of Problem Areas”, B. Parhami and F. Mavaddat. Information Processing 77 (Proc. of IFIP Congress), North-Holland, Amsterdam, pp. 673-676, 1977. Conference paper
24 1977e “Informatics in Iran: Problems and Prospects”, F. Mavaddat and B. Parhami.   Proc. of the International Conf. on Computer Applications in Developing Countries, Bangkok, Thailand, pp. 121-133, August 1977. Conference paper
25 1977f “Optimal Placement of Spare Modules in a Cascaded Chain”. IEEE Transactions on Reliability, Vol. 26, No. 4, pp. 280-282, October 1977. Journal paper
26 1978 “An Introduction to the Geometry of Digital Pictures”. Proc. of the Ninth National Mathematics Conf., Esfahan, pp. 287-293, March 1978. Conference paper
27 1978a “Errors in Digital Computers: Causes and Cures”. Australian Computer Bulletin, Vol. 2, No. 2, pp. 7-12, March 1978. Journal paper
28 1978b “Detection of Storage Errors in Mass Memories Using Arithmetic Error Codes”, B. Parhami and A. Avizienis. IEEE Transactions on Computers Vol. 27, No. 4, pp. 302-308, April 1978. Journal paper
29 1978c “Placement and Routing Techniques in Computer-Aided Design” (Extended Summary). Proc. of the Symp. on Computer-Aided Design, Tehran, Iran, pp. 1-3-a to 1-3-e, May 1978. Conference paper
30 1978d “Totally Self-Checking Peripheral Circuits for Associative Devices” (Short Paper). Proc. of the Eighth International Symp. on Fault-Tolerant Computing, Toulouse, France, p. 223, June 1978. Conference paper
31 1978e “Fault-Tolerant Digital System Hardware: Introduction and Overview”.  Proc. of the International Conf. on Measurement and Control, Athens, Greece, pp. 883-889, June 1978. Conference paper
32 1978f  “Optically Weighted Dot-Matrix Farsi and Arabic Numerals”. Information Technology 78 (Proc. of the Third Jerusalem Conf.), North-Holland, pp. 207-210, August 1978. Conference paper
33 1978g “On the Use of Farsi and Arabic Languages in Computer-Based Information Systems”. Proc. of the Symp. on the Linguistic Implications of Computer-Based Information Systems, New Delhi, India, November 1978. Conference paper
34 1979 “An Introduction to Placement and Routing Techniques in Computer-Aided Design of Printed Circuit Boards”. Bulletin of the Iranian Mathematical Society, No. 10, pp. 18L-30L, Fall 1978 & Winter 1979. Journal paper
35 1979a “A Data Structure for Family Relations”, F. Mavaddat and B. Parhami. The Computer Journal, Vol. 22, No. 2, pp. 110-113, May 1979. Journal paper
36 1979b “Interconnection Redundancy for Reliability Enhancement in Fault-Tolerant Digital Systems”. Digital Processes, Vol. 5, Nos. 3-4, pp. 199-211, 1979. Journal paper
     

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Item Year Title and Co-Authors Publication or Publisher  (Link) Category
37 1980 “Automatic Recognition of Printed Farsi Texts” (summary), B. Parhami and M. Taraghi. Proc. of the Conf. on Pattern Recognition, Oxford, England, January 1980. Conference paper
38 1981  “Language-Dependent Considerations for Computer Applications in Farsi and Arabic Speaking Countries”. System Approach for Development (Proc. of IFAC Conf.), North-Holland, Amsterdam, pp. 507-513, 1981. Conference paper
39 1981a “Application of a Minicomputer for Direct Numerical Control of Multiple Machine Tools”, B. Parhami and K. Alvandi. System Approach for Development (Proc. of IFAC Conf.), North-Holland, Amsterdam, pp. 231-236,  1981. Conference paper
40 1981b Glossary of Computers and Informatics: English/Persian, B. Parhami and V. Daie. Informatics Society of Iran, Tehran, May  1981. Reprinted many times up to 1991. Revised by an ISI committee in 1994. (Info) Book
41 1981c “Automatic Recognition of Printed Farsi Texts”, B. Parhami and M. Taraghi. Pattern Recognition, Vol. 14, Nos. 1-6, pp. 395-403, 1981. (pdf_file) Journal paper
42 1984 “Why Networking?: An Introduction to the Concepts, Terminology, Architecture, and Applications of Computer Networks”. Proc. of the UNESCO Workshop on Standardization and Modalities of Exchange from the Network Point of View, Tehran, pp. 1-27, February 1984.  Conference paper, invited
43 1984a “Developments in Dataflow Computer Architecture”. Proc. of the 15th National Iranian Mathematics Conf., Shiraz, March 1984. Conference paper
44 1984b Computer Appreciation (Aashnaaee baa Computer, in Persian).  Tehran, 210+x pp., 1984. Reprinted in 1985, 1987, and yearly thereafter. As of 2001, was still in use as a textbook. (Info) Book
45 1984c “Standard Farsi Information Interchange Code and Keyboard Layout: A Unified Proposal”. Journal of the Institution of Electrical and Telecommunications Engineers, Vol. 30, No. 6, pp. 179-183, 1984. Journal paper
46 1985 “University Education in Computer Science and Technology: The New Iranian Plan”. Proc. of the IFIP 4th World Conf. on Computers in Education, Norfolk, VA, pp. 923-930, August 1985. Conference paper
47 1986 “Computer Science and Engineering Education in a Developing Country: The Case of Iran”. Education and Computing, Vol. 2, No. 4, pp. 231-242, 1986.  Journal paper
48 1986a “A Geometric View of Mutual Exclusion and Deadlock in Computer Systems”. ACM SIGCSE Bulletin, Vol. 18, No. 4, pp. 2-5, December 1986. (pdf file) Journal paper, unrefereed
49 1987 “Systolic Up/Down Counters with Zero and Sign Detection”. Proc. of the Eighth Symp. on Computer , Como, Italy, pp. 174-178, May 1987. Conference paper
50 1987a “On the Complexity of Table  Look-Up for Iterative Division”. IEEE Transactions on Computers, Vol. 36, No. 10, pp. 1233-1236, October 1987. Journal paper
51 1987b “A General Theory of Carry-Free and Limited-Carry Computer Arithmetic”. Proc. of the Canadian Conf. on VLSI, Winnipeg, Canada, pp. 167-172, October 1987. Conference paper
52 1988 “Conversions Between Generalized Signed-Digit and Conventional Number Representations”. Proc. of the Second International Parallel Processing Symp., Fullerton, CA, pp. 95-106, April 1988. Conference paper
53 1988a “From Defects to Failures: A View of Dependable Computing”. Computer Architecture News, Vol. 16, No. 4, pp. 157-168, September 1988. (pdf_file) Journal paper, unrefereed
54 1988b “URISC: The Ultimate Reduced Instruction Set Computer”, F. Mavaddat and B. Parhami. International Journal of Electrical Engineering Education, Vol. 25, No. 4, pp. 327-334, October 1988. (pdf_file) Journal paper
55 1988c “Zero, Sign, and Overflow Detection Schemes for Generalized Signed-Digit Arithmetic”. Proc. of the 22nd Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 636-639, October/November  1988. (pdf_file) Conference paper
56 1988d “Carry-Free Addition of Recoded Binary Signed-Digit Numbers”. IEEE Transactions on Computers, Vol. 37, No. 11, pp. 1470-1476,  November 1988. (pdf_file) Journal paper
57 1988e “Design for Testability through the Enhancement of Controllabilities and Observabilities of Register Transfer Specifications”, B. Parhami and F. Mavaddat. Proc. of the Canadian Conf. on Electrical and Computer Engineering, Vancouver, BC, pp. 385-388, November 1988. Conference paper
58 1989 “A New Method for Designing Highly Parallel Binary Multipliers”. Proc. of the Third International Parallel Processing Symp., Fullerton, CA, pp. 176-185, March 1989. Conference paper
59 1989a “Minimal Multiplexer Realization of Logic Functions”. Canadian Electrical and Computer Engineering Journal, Vol. 14, No. 2, pp. 67-71, April 1989. Journal paper
60 1989b “A New Paradigm for the Design of Dependable Systems”. Proc. of the International Symp. on Circuits and Systems, Portland, OR, pp. 561-564, May 1989. (pdf_file) Conference paper
61 1989c “Optimal Universal Logic Modules for the Synthesis of Arbitrary Logic Functions”. Proc. of the 32nd Midwest Symp. on Circuits and Systems, Champaign, IL, pp. 212-215, August 1989. (pdf_file) Conference paper
62 1989d “A Data-Driven Dependability Assurance Scheme with Applications to Data and Design Diversity”. Proc. of the IFIP International Working Conf. on Dependable Computing for Critical Applications, Santa Barbara, CA, pp. 105-112, August 1989. Conference paper
63 1989e “Parallel Counters for Signed Binary Signals”. Proc. of the 23rd Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 513-516, October/November 1989. (pdf_file) Conference paper
64 1989f “A Framework for the Study of Computer System Dependability”. Proc. of the 23rd Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 1017-1021, October/November 1989. (pdf_file) Conference paper
65 1989g “Optimal Number of Disk Clock Tracks for Block-Oriented Rotating Associative Processors”. IEE Proceedings – Part E: Computers and Digital Techniques, Vol. 136, No. 6, pp. 535-538, November 1989. (pdf_file) Journal paper
     

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Item Year Title and Co-Authors Publication or Publisher  (Link) Category
66 1990 “Generalized Signed-Digit Number Systems: A Unifying Framework for Redundant Number Representations”. IEEE Transactions on Computers, Vol. 39, No. 1, pp. 89-98, January 1990. (pdf_file) Journal paper
67 1990a “Associative Memory Designs for VLSI Implementation”. Proc. of the International Conf. on and Their Applications, Miami, FL, pp. 359-366, March 1990. (pdf_file) Conference paper
68 1990b “Massively Parallel Search Processors: History and Modern Trends”. Proc. of the Fourth International Parallel , Fullerton, CA, pp. 91-104, April 1990. Conference paper
69 1990c “A Unified Approach to Correctness and Timeliness Requirements for Ultrareliable Concurrent Systems”. Proc. of the Fourth International Parallel Processing Symp., Fullerton, CA, pp. 733-747, April 1990. Conference paper
70 1990d “Systolic Associative Memories”. Proc. of the International Conf. on Parallel Processing, St. Charles, IL, Vol. I, pp. I-545 to I-548, August 1990. Conference paper
71 1991 “The Mixed Serial/Parallel Approach to VLSI Search Processors”. Proc. of the 24th Hawaii International Conf. on System Sciences, Minitrack on Associative Processing, Koloa, Hawaii, Vol. I, pp. 202-211, January 1991. (pdf_file) Conference paper
72 1991a “A Data-Driven Dependability Assurance Scheme with Applications to Data and Design Diversity”. In Dependable Computing for Critical Applications (Dependable Computing and Fault-Tolerant Systems, Vol. 4), Springer-Verlag, Wien, pp. 257-282,  1991. Book chapter
73 1991b “High-Performance Parallel Pipelined Voting Networks”. Proc. of the Fifth International Parallel Processing Symp., Anaheim, CA, pp. 491-494, April/May 1991. (pdf_file) Conference paper
74 1991c “Scalable Architectures for VLSI-Based Associative Memories”. In Parallel Architectures, Edited by N. Rishe, S. Navathe, and D. Tal, IEEE Computer Society Press, pp. 181-200, 1991. Book chapter
75 1991d “Voting Networks”. IEEE Transactions on Reliability, Vol. 40, No. 3, pp. 380-394, August 1991. (pdf_file) Journal paper
76 1991e “The Parallel Complexity of Weighted Voting”. Proc. of the International Conf. on and Systems, Washington, DC, pp. 382-385, October 1991. Conference paper
77 1991f “New Classes of Unidirectional Error-Detecting Codes”. Proc. of the International Conf. on Computer Design, Cambridge, MA, pp. 574-577, October 1991. (pdf_file) Conference paper
78 1991g “Design of m-out-of-n Bit-Voters”. Proc. of the 25th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, Vol. 2, pp. 1260-1264, November 1991. (pdf_file) Conference paper
79 1992 “Optimal Aspect Ratio and Number of Separable Row/Column Buses for Mesh-Connected Parallel Computers”, M.J. Serrano and B. Parhami. Proc. of the Sixth International Parallel Processing Symp., Beverly Hills, CA, pp. 343-347, March 1992. (pdf_file) Conference paper
80 1992a “Optimal Algorithms for Exact, Inexact, and Approval Voting”. Proc. of the 22nd International Symp. on Fault-Tolerant Computing, Boston, pp. 404-411, July 1992. (pdf_file) Conference paper
81 1992b “Flexible Massively Parallel Arithmetic on Associative Processors” (Extended Abstract). Proc. of the Associative Processing and Applications Workshop, Syracuse, NY, pp. 16-1 to 16-8, July 1992. Conference paper
82 1992c “Systolic Number Radix Converters”. The Computer Journal, Vol. 35, No. 4, pp. 405-409, August 1992. Journal paper
83 1992d “Architectural Tradeoffs in the Design of VLSI-Based Associative Memories”. Microprocessing and Microprogramming, Vol. 36, No. 1, pp. 27-41, November 1992. Journal paper
84 1993 “Scheduling of Replicated Tasks to Meet Correctness Requirements and Deadlines”, B. Parhami and C.Y. Hung. Proc. of the 26th Hawaii International Conf. on System Sciences, Vol. 2, pp. 506-515, January 1993. (pdf_file) Conference paper
85 1993a “Alternate Memory Compression Schemes for Modular Multiplication”, B. Parhami and H.-F. Lai. IEEE Transactions on Signal Processing, Vol. 41, No. 3, pp. 1378-1385, March 1993. (pdf_file) Journal paper
86 1993b “On the Implementation of Arithmetic  Support Functions for Generalized Signed-Digit Number Systems”. IEEE Transactions on Computers, Vol. 42, No. 3, pp. 379-384, March 1993. (pdf_file) Journal paper
87 1993c “Average-Case-Optimal Maximum and Minimum Finding on Fully Parallel Associative Memories”. Proc. of the Associative Processing and Applications Workshop, Syracuse, NY, pp. 9-1 to 9-7, July 1993. Conference paper
88 1993d “Fault Tolerance Properties of Mesh-Connected Parallel Computers with Separable Row/Column Buses”. Proc. of the 36th Midwest Symp. on Circuits and Systems, Detroit, MI, pp. 1128-1131, August 1993. (pdf_file) Conference paper
89 1993e “Generalized Signed-Digit Multiplication and Its Systolic Realizations”, C.Y. Hung and B. Parhami. Proc. of the 36th Midwest Symp. on Circuits and Systems, Detroit, MI, pp. 1505-1508, August 1993. (pdf_file) Conference paper
90 1993f “Optimal Architectures and Algorithms for Mesh-Connected Parallel Computers with Separable Row/Column Buses”, M.J. Serrano and B. Parhami. IEEE Transactions on Parallel and Distributed Systems, Vol. 4, No. 10, pp. 1073-1080, October 1993. (pdf_file) Journal paper
91 1993g “Optimal Table-Lookup Schemes for Binary-to-Residue and Residue-to-Binary Conversions”. Proc. of the 27th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, Vol. 1, pp. 812-816, November 1993. (pdf_file) Conference paper
92 1994 “An Approximate Sign Detection Method for Residue Numbers and Its Application to RNS Division”, C.Y. Hung and B. Parhami. Computers & Mathematics with Applications, Vol. 27, No. 4, pp. 23-35, February 1994. (pdf file) Journal paper
93 1994a  “Comments on ‘Evaluation of A + B = K Conditions Without Carry Propagation’ ”. IEEE Transactions on Computers, Vol. 43, No. 3, p. 381, March 1994. (pdf_file) Journal paper
94 1994b “Threshold Voting is Fundamentally Simpler than Plurality Voting”. International Journal of Reliability, Quality, and Safety  Engineering, Vol. 1, No. 1, pp. 95-102, March 1994. Journal paper
95 1994c “Optimal Timing Schemes for Head-per-Track Mass Memories in a Class of Massively Parallel Database Processors”. Proc. of the Iranian Conf. on Electrical Engineering, Tehran, May 1994. Conference paper
96 1994d “A Multi-Level View of Dependable  Computing”. Computers & Electrical Engineering, Vol. 20, No. 4, pp. 347-368, July 1994. Journal paper
97 1994e “Fast RNS Division Algorithms for Fixed Divisors with Application to RSA Encryption”, C.Y. Hung and B. Parhami. Information Processing Letters, Vol. 51, No. 4, pp. 163-169, August 24, 1994. Journal paper
98 1994f “Optimal Table Lookup Schemes for VLSI Implementation of Input/Output Conversions and Other Residue Number Operations”, B. Parhami and C.Y. Hung. VLSI Signal Processing VII (Proc. of IEEE Workshop), La Jolla, CA, pp. 470-481, October 26-28,  1994. (pdf_file) Conference paper
99 1994g “Implementation Alternatives for Generalized Signed-Digit Addition”. Proc. of the 28th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 157-161, October/November 1994. (pdf_file) Conference paper
100 1994h “Analysis of Tabular Methods for Modular Reduction”. Proc. of the 28th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 526-530, October/November 1994. (pdf_file) Conference paper
101 1994i “Voting Algorithms”. IEEE Transactions on Reliability,   December 1994.  (pdf_file) Journal paper
     

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Item Year Title and Co-Authors Publication or Publisher  (Link) Category
102 1995 “Periodically Regular Chordal Ring Networks for Massively Parallel Architectures”. Proc. of the Fifth Symp. on the Frontiers of Massively  Parallel Computation, McLean, VA, pp. 315-322, February 1995. (pdf_file) Conference paper
103 1995a “Robust Shearsort on Incomplete Bypass Meshes”, B. Parhami and C.Y. Hung. Proc. of the Ninth International Parallel Processing Symp., Santa Barbara, CA, pp. 304-311, April 1995. (pdf_file) Conference paper
104 1995b “Panel Assesses SIMD’s Future”. Computer, Vol. 28, No. 6, pp. 89-91, June 1995. Journal paper, unrefereed
105 1995c “SIMD Machines: Do They Have a Significant Future?” (printed in two different journals) IEEE Computer Society Technical Committee on Computer Architecture pp. 23-26, August 1995, also in Computer Architecture News, Vol. 23, No. 4, pp. 19-22, September 1995. (pdf_file) Journal paper, unrefereed
106 1995d “Multi-Sensor Data Fusion and Reliable Multi-Channel Computation: Unifying Concepts and Techniques”. Proc. of the 29th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 745-749, October/November 1995. (pdf_file) Conference paper
107 1995e “Accumulative Parallel Counters”,  B. Parhami and C.-H. Yeh. Proc. of the 29th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 966-970, October/November 1995. (pdf_file) Conference paper
108 1995f “Error Analysis of Approximate Chinese-Remainder-Theorem Decoding”, C.Y. Hung and B. Parhami. IEEE Transactions on Computers, Vol. 44, No. 11, pp. 1344-1348, November 1995. (pdf_file) Journal paper
109 1995g “Periodically Regular Chordal Rings as Fault-Tolerant Loops”, D.-M. Kwai and B. Parhami. Proc. of the Pacific Rim International Symp. on Fault-Tolerant Systems, Newport Beach, CA, pp. 210-215, December 1995. Conference paper
110 1995h “Parallel Selection Algorithms for Associative Processors”. Proc. of the First Annual CSI Computer Conf., Tehran, Iran, pp. 41-46, December 25-28, 1995. Conference paper
111 1995i “On Lower Bounds for the Dimensions of Dot-Matrix Characters to Represent Farsi and Arabic Scripts”. Proc. of the First Annual CSI Computer Conf., Tehran, Iran, pp. 125-130, December 25-28, 1995. Conference paper
112 1996 “Performance Analysis and Optimization of Search and Selection Algorithms for Highly Parallel Associative Memories”. Proc. of  the Fourth International Workshop on Modeling, Analysis and Simulation of  Computer and Telecommunication Systems, San Jose, CA, pp. 217-221, February 1-3, 1996. (pdf_file) Conference paper
113 1996a “Comparing the Performance Parameters of Two Network Structures for Scalable Massively Parallel Processors”, D.-M. Kwai  and B. Parhami. Proc. of  the Fourth International Workshop on Modeling, Analysis and Simulation of  Computer and Telecommunication Systems, San Jose, CA, pp. 273-277, February 1-3, 1996. (pdf_file) Conference paper
114 1996b “Recursively Fully-Connected Networks: A Class of High-Performance Low-Degree Interconnection Networks”, C.-H. Yeh and B. Parhami. Proc. of the 11th International Conf. on Computers and Their Applications, San Francisco, CA, pp. 227-230, March 7-9, 1996. Conference paper
115 1996c “Extreme-Value Search and General Selection Algorithms for Fully Parallel Associative Memories”. The Computer Journal, Vol. 39, No. 3, pp. 241-250, 1996. Journal paper
116 1996d “Parallel Algorithms on Three-Level Hierarchical Cubic Networks”, C.-H. Yeh and B. Parhami. High-Performance Computing '96: Grand Challenges in Computer Simulation, New Orleans, LA, pp. 226-231, April 8-11, 1996. Conference paper
117 1996e “Comments on ‘High-Speed Area-Efficient Multiplier Design Using Multiple-Valued Current Mode Circuits’”. IEEE Transactions on Computers, Vol. 45, No. 5, pp. 637-638, May 1996. (pdf_file) Journal paper
118 1996f “A Taxonomy of Voting Schemes for Data Fusion and Dependable Computation”. Reliability Engineering and System Safety, Vol. 52, No. 2, pp. 139-151, May 1996. Journal paper
119 1996g “Swapped Networks: Unifying the Architectures and Algorithms of a Wide Class of Hierarchical Parallel Processors”, C.-H. Yeh and B. Parhami. Proc. of the International Conf. on Parallel and Distributed Systems, Tokyo, pp. 230-237, June 3-6, 1996. (pdf_file) Conference paper
120 1996h “Recursive Hierarchical Fully- Connected Networks: A Class of Low-Degree Small-Diameter Interconnection Networks”, C.-H. Yeh and B. Parhami. Proc. of the Second International Conf. on Algorithms and Architectures for Parallel Processing, Singapore, pp. 163-170, June 11-13, 1996. (pdf_file) Conference paper
121 1996i “Parallel Algorithms for m-out-of-n Threshold Voting”. Proc. of the Second International Conf. Parallel Processing, Singapore, pp. 225-232, June 11-13, 1996. (pdf_file) Conference paper
122 1996j “Fault-Tolerant Processor Arrays Using Space and Time Redundancy”, D.-M. Kwai and B. Parhami. Proc. of the Second International Conf. on Algorithms and Architectures for Parallel Processing, Singapore, pp. 303-310, June 11-13, 1996. (pdf_file) Conference paper
123 1996k “Hierarchical Swapped Networks: Efficient Low-Degree Alternatives to Hypercubes and Generalized Hypercubes”, C.-H. Yeh and B. Parhami. Proc. of the International Symp. on Parallel Architectures, Algorithms, and Networks, Beijing, China, pp. 90-96, June 12-14, 1996. (pdf_file) Conference paper
124 1996l “A Characterization of Symmetric Chordal Rings Using Redundant Number Representations”, B. Parhami and D.-M. Kwai. Proc. of the 11th International Conf. on Systems Engineering, Las Vegas, NV, pp. 467-472, July 9-11, 1996. Conference paper
125 1996m “Unified Formulation of a Wide Class of Scalable Interconnection Networks Based on Recursive Graphs”, C.-H. Yeh and B. Parhami. Proc. of the 11th International Conf. on Systems Engineering, Las Vegas, NV, pp. 491-496, July 9-11, 1996. Conference paper
126 1996n “Cyclic Petersen Networks – Efficient Fixed-Degree Interconnection Networks for Large-Scale Multicomputer Systems”, C.-H. Yeh and B. Parhami. Proc. of the International Conf. on Parallel and Distributed Processing: Techniques and Applications, Sunnyvale, CA, pp. 549-560, August 9-11, 1996. Conference paper
127 1996o “Numerical Computation on Massively Parallel Processors Based on Residue Number System Arithmetic”. Proc. of the International Conf. on Parallel and Distributed Processing: Techniques and Applications, Sunnyvale, CA, pp. 931-934, August 9-11, 1996. Conference paper
128 1996p “A Class of Parallel Architectures for Fast Fourier Transform”, C.-H. Yeh and B. Parhami.  Proc. of the 39th Midwest Symp. on Circuits and Systems, Ames, IA, pp. 856-859, August 18-21, 1996. (pdf_file) Conference paper
129 1996q “A Note on Digital Filter Implementation Using Hybrid RNS-Binary Arithmetic”. Signal Processing, Vol. 51, pp. 65-67, 1996. Journal paper
130 1996r “FFT Computation with Linear Processor Arrays Using a Data-Driven Control Scheme”, D.-M. Kwai and B. Parhami. Journal of VLSI Signal Processing, Vol. 13, No. 1, pp. 57-66, August 1996. Journal paper
131 1996s “Periodically Regular Chordal Rings: Generality, Scalability, and VLSI Layout”, D.-M. Kwai and B. Parhami.    Proc. of the 8th IEEE Symp. on Parallel and Distributed Processing, New Orleans, LA, pp. 148-151, October 23-26, 1996. (pdf_file) Conference paper
132 1996t “Recursive Hierarchical Swapped Networks: Versatile Interconnection Architectures for Highly Parallel Systems”, C.-H. Yeh and B. Parhami. Proc. of the 8th IEEE Symp. on Parallel and Distributed Processing, New Orleans, LA, pp. 453-460, October 23-26, 1996. (pdf_file) Conference paper
133 1996u “Design of Reliable Software via General Combination of N-Version-Programming and Acceptance-Testing”. Proc. of the 7th International Symp. on Software Reliability Engineering, White Plains, NY, pp. 104-109, October 30 – November 2, 1996. (pdf_file) Conference paper
134 1996v “Arithmetic Structures for Inner-Product and Other Computations Based on a Latency-Free Bit-Serial Multiplier Design”, S. Haynal and B. Parhami. Proc. of the 30th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 197-201, November 3-6, 1996. (pdf_ file) Conference paper
135 1996w “Efficient Pipelined Multi-Operand Adders with High Throughput and Low Latency: Designs and Applications”, C.-H. Yeh and  B. Parhami. Proc. of the 30th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 894-898, November 3-6, 1996. (pdf_file) Conference paper
136 1996x “Variations on Multi-Operand Addition for Faster Logarithmic-Time Tree Multipliers”. Proc. of the 30th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 899-903, November 3-6, 1996. (pdf_file) Conference paper
137 1996y “A Generalization of Hypercubic Networks Based on Their Chordal Ring Structures”, D.-M. Kwai and B. Parhami. Parallel Processing Letters, Vol. 6, No. 4, pp. 469-477, 1996. Journal paper
138 1996z “Parallel Threshold Voting”. The Computer Journal, Vol. 39, No. 8, pp. 692-700, 1996. Journal paper
139 1997 “Design of High-Performance Massively Parallel Architectures under Pin Limitations and Non-Uniform Propagation Delay”, C.-H. Yeh and B. Parhami. Proc. Second Aizu International Symp. on Parallel Algorithms/Architecture Synthesis (pAs’97), Aizu, Japan, pp. 58-65, March 17-21, 1997. (pdf_file) Conference paper
140 1997a “An On-Line Fault Diagnosis Scheme for Linear Processor Arrays”, D.-M. Kwai and B. Parhami. Microprocessors and Microsystems, Vol. 20, No. 7, pp. 423-428, March 17, 1997. Journal paper
141 1997b “Cyclic Networks –– A Family of Versatile Fixed-Degree Interconnection Architectures”, C.-H. Yeh and B. Parhami. Proc. of the 11th International Parallel Processing Symp., Geneva, pp. 739-743, April 1-5,  1997. (pdf_file) Conference paper
142 1997c “Modular Reduction by Multilevel Table Lookup”. Proc. of the 40th Midwest Symp. on Circuits and Systems, Sacramento, Vol. 1, pp. 381-384, August 3-6, 1997. (pdf_file) Conference paper
143 1997d “Area-Time Tradeoffs in FIR Digital Filters with Broadcast and Pipelined Designs”, D.-M. Kwai and B. Parhami.  Proc. of the 40th Midwest Symp. on Circuits and Systems, Sacramento, Vol. 1, pp. 449-452, August 3-6, 1997. (pdf_file) Conference paper
144 1997e “A Vector Quantizer with Fully Pipelined Data and Control Flow”, D.-M. Kwai and B. Parhami.  Proc. of the 40th Midwest Symp. on Circuits and Systems, Sacramento, Vol. 2, pp. 1057-1060, August 3-6, 1997. (pdf_file) Conference paper
145 1997f “Optimal Sorting Algorithms on Incomplete Meshes with Arbitrary Fault Patterns”, C.-H. Yeh and B. Parhami. Proc. of the International Conf. on Parallel Processing (ICPP’97), pp. 4-11, August 11-15, 1997. (pdf_file) Conference paper
146 1997g “A Class of Fixed-Degree Cayley-Graph Interconnection Networks Derived by Pruning k-ary n-cubes”, D.-M. Kwai and B. Parhami.  Proc. of the International Conf. on Parallel Processing (ICPP’97), pp. 92-95, August 11-15, 1997. (pdf_file) Conference paper
147 1997h “A Note on Architectures for Large-Capacity CAMs”. Integration: The VLSI Journal, Vol. 22, pp. 165-171, August 1997.  Journal paper
148 1997i “Search and Data Selection Algorithms for Associative Processors”. In Associative Processing and Processors, Edited by A. Krikelis and C. Weems, IEEE Computer Society Press, pp. 10-25, 1997. Book chapter
149 1997j “Introduction to the Special Issue Focusing on Computer Systems”. Scientia Iranica, Vol. 3, No. 4, pp. vii-viii, Winter 1997. (read) Journal paper, invited
150 1997k “Defect, Fault, Error, . . . , or Failure?”. IEEE Transactions on Reliability, Vol. 46, No. 4, pp. 450-451, December 1997. (pdf_file) Journal paper
151 1998 “Tight Bounds on the Diameter of Gaussian Cubes”, D.-M. Kwai and B. Parhami. The Computer Journal, Vol. 41, No. 1, pp. 52-56, 1998.  Journal paper
152 1998a “The Robust Algorithm Approach to Fault Tolerance on Processor Arrays: Fault Models, Fault Diameter, and Basic Algorithms”, B. Parhami and C.-H. Yeh. Proc. of the Joint 12th International Parallel Processing Symp. and the 9th Symp. on Parallel and Distributed Processing, Orlando, FL, pp. 742-746, March 30 to April 3, 1998. (pdf_ file) Conference paper
153 1998b “Wormhole Routing on a Class of High-Performance Fixed-Degree Parallel Processor Networks”, B. Parhami and D.-M. Kwai. Proc. of the 10th International Conf. on Parallel and Distributed Computing and Systems (PDCS’98), Las Vegas, NV, pp. 376-378, October 28-31, 1998. Conference paper
154 1998c “Synthesizing High-Performance Parallel Architectures under Inter-Module Bandwidth Constraints”, C.-H. Yeh and B. Parhami. Proc. of the 10th International Conf. on Parallel and Distributed Computing and Systems (PDCS’98), Las Vegas, NV, pp. 414-416, October 28-31, 1998. Conference paper
155 1998d “Efficient VLSI Layouts of the Complete Graph, Star Graph, and Related Networks”, C.-H. Yeh and B. Parhami. Proc. of the 10th International Conf. on Parallel and Distributed Computing and Systems (PDCS’98), Las Vegas, NV, pp. 427-432, October 28-31, 1998. Conference paper
156 1998e “A Number Representation Scheme with Carry-Free Rounding for Floating-Point Signal Processing Applications”, B. Parhami and S. Johansson. Proc. of the International Conf. on Signal & Image Processing (SIP’98), Las Vegas, NV, pp. 90-92, October 28-31, 1998. (pdf_file) Conference paper
157 1998f “Applying Data-Driven Control to a Stable Sorter”, B. Parhami and D.-M. Kwai. Proc. of the International Conf. on Signal & Image Processing (SIP’98), Las Vegas, NV, pp. 134-136, October 28-31, 1998. Conference paper
158 1998g “Haar Transform with a Linear Processor Array Using a Data-Driven Control Scheme”, D.-M. Kwai and B. Parhami. Proc. of the International Conf. on Signal & Image Processing (SIP’98), Las Vegas, NV, pp. 166-168, October 28-31, 1998. Conference paper
159 1998h “VLSI Layouts of Complete Graphs and Star Graphs”, C.-H. Yeh and B. Parhami. Information Processing Letters, Vol. 68, No. 1, pp. 39-45, October 15, 1998. Journal paper
160 1998i “Pruned Three-Dimensional Toroidal Networks”, D.-M. Kwai and B. Parhami. Information Processing Letters, Vol. 68, No. 4, pp. 179-183, November 30, 1998. Journal paper
161 1998j “A New Representation of Graphs and Its Applications to Parallel Processing”, C.-H. Yeh and B. Parhami. Proc. of the International Conf. on Parallel and Distributed Systems, Tainan, Taiwan, pp. 702-709, December 14-16, 1998. Conference paper
162 1999 Introduction to Parallel Processing: Algorithms and Architectures. (includes instructor’s manuals) Plenum Press, New York, 532 + xxi pp, 1999. ISBN 0-306-45970-1. Detailed information and errata available at the Web page for Parhami's parallel processing book Book
163 1999a “Data-Driven Control Scheme for Linear Arrays: Application to a Stable Insertion Sorter”, B. Parhami and D.-M. Kwai. IEEE Transactions on Parallel and Distributed Systems, Vol. 10, No. 1, pp. 23-28, January 1999. (pdf_file) Journal paper
164 1999b “Efficient VLSI Layouts of Hypercubic Networks”, C.-H. Yeh, E.A. Varvarigos, and B. Parhami.  Proc. of the 7th Symp. on the Frontiers of Massively Parallel Computation, Annapolis, MD, pp. 98-105, February 21-25, 1999. (ps_ file) Conference paper
165 1999c “Combinational Circuits”, B. Parhami and D.-M. Kwai. Encyclopedia of Electrical and Electronics Engineering, Wiley, Vol. 3, pp. 562-569, 1999. (pdf file) Book chapter, invited
166 1999d “2.5n-Step Sorting on n × n Meshes in the Presence of o(n1/2) Worst-Case Faults”, C.-H. Yeh, B. Parhami, H. Lee, and E.A. Varvarigos. Proc. of the Joint 13th International Parallel Processing Symp. and the 10th Symp. on Parallel & Distributed Processing, San Juan, Puerto Rico, pp. 436-440, April 12-16, 1999. (pdf_file) Conference paper
167 1999e “The Recursive Grid Layout Scheme for VLSI Layout of Hierarchical Networks”, C.-H. Yeh, B. Parhami, and E.A. Varvarigos.  Proc. of the Joint 13th International Parallel Processing Symp. and the 10th Symp. on Parallel & Distributed Processing, San Juan, Puerto Rico, pp. 441-445, April 12-16, 1999. (pdf_file) Conference paper
168 1999f “Scalability of Programmable FIR Digital Filters”, D.-M. Kwai and B. Parhami.  Journal of VLSI Signal Processing, Vol. 21, No. 1, pp. 31-35, May 1999. (pdf_file) Journal paper
169 1999g “Periodically Regular Chordal Rings”, B. Parhami and D.-M. Kwai. IEEE Transactions on Parallel and Distributed Systems, Vol. 10, No. 6, pp. 658-672, June 1999. (pdf_file) [Printer’s errors corrected: No. 7, pp. 767-768, July 1999. (pdf_file)] Journal paper
170 1999h Instructor’s Manual for Introduction to Parallel Processing: Algorithms and Architectures. Plenum Press, New York, 303 + vi pp., 1999. (presentation material also available via book's Web page ) Book supplement
171 1999i “The Index-Permutation Graph Model for Hierarchical Interconnection Networks”, C.-H. Yeh and B. Parhami. Proc. of the International Conf. on Parallel Processing, Aizu, Japan, pp. 48-55, September 21-24, 1999. (pdf_file) Conference paper
172 1999j “Routing and Embeddings in Cyclic Petersen Networks: An Efficient Extension of the Petersen Graph”, C.-H. Yeh and B. Parhami. Proc. of the International Conf. on Parallel Processing, Aizu, Japan, pp. 258-265, September 21-24, 1999. (pdf_file) Conference paper
173 1999k “Analysis of the Lookup Table Size for Square-Rooting”. Proc. of the 33rd Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 1327-1330, October 24-27, 1999. (pdf_file) Conference paper
174 1999l “Optimal-Depth Threshold Circuits for Multiplication and Related Problems”, C.-H. Yeh, E.A. Varvarigos,  B. Parhami, and H. Lee. Proc. of the 33rd Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 1331-1335, October 24-27, 1999. (pdf_file) Conference paper
175 1999m “Efficient Designs for Multi-Input Counters”, C.-H. Yeh and B. Parhami. Proc. of the 33rd Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 1340-1344, October 24-27, 1999. (pdf_file) Conference paper
176 1999n “Comparing Torus, Pruned Torus, and Manhattan Street Networks as Interconnection Architectures for Highly Parallel Computers”, D.-M. Kwai and B. Parhami. Proc. of the 11th International Conf. on Parallel and Distributed Computing and Systems, Cambridge, MA, pp. 19-22, November 3-6, 1999. Conference paper
177 1999o “Scalable Communication Protocols for High-Speed Networks”, C.-H. Yeh, E.A. Varvarigos, V. Sharma, and B. Parhami. Proc. of the 11th International Conf. on Parallel and Distributed Computing and Systems, Cambridge, MA, pp. 417-422, November 3-6, 1999. Conference paper
178 1999p “High-Performance Array Processing with Fully Pipelined Data Streams and Control Paths”, D.-M. Kwai and B. Parhami. Proc. of the 11th International Conf. on Parallel and Distributed Computing and Systems, Cambridge, MA, pp. 609-612, November 3-6, 1999. Conference paper
     

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Item Year Title and Co-Authors Publication or Publisher (Link) Category
179 2000  Computer Arithmetic: Algorithms and Hardware Designs. (includes instructor’s manuals) Oxford University Press, New York, 490 + xx pp., 2000. ISBN 0-19-512583-5. Detailed information and errata available at the Web page for Parhami's arithmetic book Book
180 2000a Instructor’s Manual for Computer Arithmetic: Algorithms and Hardware Designs. Oxford University Press, New York. Vol. 1: Problem Solutions, 154 + iv pp., 2000. ISBN 0-19-513949-6, available from the publisher. Vol. 2: Presentation Material, available via Web page for Parhami's arithmetic book Book supplement
181 2000b “Challenges in Interconnection Network Design in the Era of Multiprocessor and Massively Parallel Microchips”, B. Parhami and D.-M. Kwai. Proc. of the International Conf. on Communications in Computing, Las Vegas, NV, pp. 241-246, June 26-29, 2000. Conference paper
182 2000c “Why Network Diameter is Still Important”, B. Parhami and C.-H. Yeh. Proc. of the International Conf. on Communications in Computing, Las Vegas, NV, pp. 271-274, June 26-29, 2000. Conference paper
183 2000d “Extended-Fault Diameter of Mesh Networks”. Proc. of the International Conf. on Parallel and Distributed Processing Techniques and Applications, Las Vegas, NV, pp. 1035-1039, June 26-29, 2000. Conference paper
184 2000e “Characterization and Generalization of Honeycomb and Diamond Networks”, B. Parhami and D.-M. Kwai. Proc. of the International Conf. on Parallel and Distributed Processing Techniques and Applications, Las Vegas, NV, pp. 2947-2951, June 26-29, 2000. Conference paper
185 2000f “VLSI Layout and Packaging of Butterfly Networks”, C.-H. Yeh, B. Parhami, E.A. Varvarigos, and H. Lee. Proc. of the 12th ACM Symp. on Parallel Algorithms and Architectures, Bar Harbor, Maine, pp. 196-205, July 9-13, 2000. (ps_file) (pdf_file) Conference paper
186 2000g “Multilayer VLSI Layout for Interconnection Networks”, C.-H. Yeh, E.A. Varvarigos, and B. Parhami. Proc. of the International Conf. on Parallel Processing, Toronto, Canada, pp. 33-40, August 21-24, 2000. (ps_file) (pdf_file) Conference paper
187 2000h “Configurable Arithmetic Arrays With Data-Driven Control”. Proc. of the 34th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 89-93, October 29 to November 1, 2000. (pdf_file) Conference paper
188 2000i “On Producing Exactly Rounded Results in Digit-Serial On-Line Arithmetic”.  Proc. of the 34th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 889-893, October 29 to November 1, 2000. (pdf_file) Conference paper
189 2000j “Designs of Counters with Near-Minimal Counting/Sampling Periods and Hardware Complexity”, C.-H. Yeh, B. Parhami, and Y. Wang. Proc. of the 34th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 894-898, October 29 to November 1, 2000. (pdf_file) Conference paper
190 2000k “Optimal-Depth Circuits for Prefix Computation and Addition”, C.-H. Yeh, E.A. Varvarigos, and B. Parhami. Proc. of the 34th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 1349-1353, October 29 to November 1, 2000. (pdf_file) Conference paper
191 2001 “A Unified Formulation of Honeycomb and Diamond Networks”, B. Parhami and D.-M. Kwai. IEEE Transactions on Parallel and Distributed Systems, Vol. 12, No. 1, pp. 74-80, January 2001. (pdf_file) Journal paper
192 2001a “RACE: A Software-Based Fault Tolerance Scheme for Systematically Transforming Ordinary Algorithms to Robust Algorithms”, C.-H. Yeh, B. Parhami, E.A. Varvarigos, and T.A. Varvarigou. Proc. of the International Parallel and Distributed Processing Symp., San Francisco, CA, 6 pp. in CD-ROM proceedings, abstract on p. 32 of hard-copy program, April 23-27, 2001. (ps_file) (pdf_file) Conference paper
193 2001b “On the VLSI Area and Bisection Width of Star Graphs and Hierarchical Cubic Networks”, C.-H. Yeh and B. Parhami. Proc. of the International Parallel and Distributed Processing Symp., San Francisco, CA, 8 pp. in CD-ROM proceedings, abstract on p. 72 of hard-copy program, April 23-27, 2001. (ps_file) (pdf_file) Conference paper
194 2001c “Scalable Linear Array Architecture with Data-Driven Control for Ultrahigh-Speed Vector Quantization”, D.-M. Kwai and B. Parhami. Journal of VLSI Signal Processing, Vol. 28, No. 3, pp. 235-243, July 2001. (pdf_file) Journal paper
195 2001d

 

“Parallel Algorithms for Index-Permutation Graphs – An Extension of Cayley Graphs for Multiple Chip-Multiprocessors”, C.-H. Yeh and B. Parhami. Proc. of the International Conf. on Parallel Processing, Valencia, Spain, pp. 3-12, September 3-7, 2001. (ps_file) (pdf file) Conference paper
196 2001e “A Class of Stored-Transfer Representations for Redundant Number Systems”, G. Jaberipur, B. Parhami, and M. Ghodsi. Proc. of the 35th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 1304-1308, November 4-7, 2001. (pdf_file) Conference paper
197 2001f “RNS Representations with Redundant Residues”.  Proc. of the 35th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 1651-1655, November 4-7, 2001. (pdf_file) Conference paper, invited
198 2001g “Precision Requirements for Quotient Digit Selection in High-Radix Division”.  Proc. of the 35th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 1670-1673, November 4-7, 2001.  (pdf_file) Conference paper
199 2001h “Approach to Component Based Synthesis of Fault-Tolerant Software”. Informatica, Special Issue on Component Based Software Development, Vol. 25, No. 4, pp. 533-543, November 2001. (pdf file) Journal paper
200 2002 “Application of Symmetric Redundant Residues for Fast and Reliable Arithmetic”. Proc. SPIE Conf. Advanced Signal Processing Algorithms, Architectures, and Implementations XII, Seattle, WA, pp. 393-402, July 7-11, 2002. (ps_file) Conference paper, invited
201 2002a “Parity-Preserving Transformations in Computer Arithmetic”. Proc. SPIE Conf. Advanced Signal Processing Algorithms, Architectures, and Implementations XII, Seattle, WA, pp. 403-411, July 7-11, 2002. (ps_file) Conference paper, invited
202 2002b “ART: Robustness of Meshes and Tori for Parallel and Distributed Computation”, C.-H. Yeh and B. Parhami. Proc. of the International Conf. on Parallel Processing, Vancouver, Canada, pp. 463-472, August 18-21, 2002. (ps_file) (pdf_file) Conference paper
203 2002c “Number Representation and Computer Arithmetic”. Encyclopedia of Information Systems, Academic Press, Vol. 3, pp. 317-333, 2002. (pdf file) Book chapter, invited
204 2002d “An Approach to the Design of Parity-Checked Arithmetic Circuits”. Proc. of the 36th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 1084-1088, November 3-6, 2002. (ps_file) (pdf_file) Conference paper
205 2002e “Weighted Bit-Set Encodings for Redundant Digit Sets: Theory and Applications”, G. Jaberipur, B. Parhami, and M. Ghodsi. Proc. of the 36th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, pp. 1629-1633, November 3-6, 2002. (ps_file) (pdf_file) Conference paper
206 2003 “Parallel Architectures and Adaptation Algorithms for Programmable FIR Digital Filters with Fully Pipelined Data and Control Flows”, B. Parhami and D.-M. Kwai. Journal of Information Science and Engineering, Vol. 19, No. 1, pp. 59-74, January 2003. (pdf_file) Journal paper
207 2003a Tight Upper Bounds on the Minimum Precision Required of the Divisor and the Partial Remainder in High-Radix Division. IEEE Transactions on Computers, Vol. 52, No. 11, pp. 1509-1514, November 2003. (pdf_file) Journal paper
208 2003b “Some Conclusions on Cayley Digraphs and Their Applications to Interconnection Networks,” W.J. Xiao and B. Parhami. Proc. of the Second International Workshop on Grid and Cooperative Computing,  Shanghai, December 7-10, 2003. Lecture Notes in Computer Science, Vol. 3033, ed. by M. Li et al, Springer-Verlag, 2004, pp. 408-412. (pdf_file) Conference paper
209 2004 “Incomplete k-ary n-cube and Its Derivatives,” B. Parhami and D.-M. Kwai. Journal of Parallel and Distributed Computing, Vol. 64, No. 2, pp. 183-190, February 2004. (pdf_file) Journal paper
210 2004a “Some Properties of Swapped Interconnection Networks.” Proc. International Conf. on Communications in Computing, Las Vegas, NV, June 21-24, 2004, pp. 93-99. (pdf_file) (ps_file) Conference paper
211 2004b “Hexagonal and Pruned Torus Networks as Cayley Graphs,” W.J. Xiao and B. Parhami. Proc. International Conf. on Communications in Computing, Las Vegas, NV, June 21-24, 2004, pp. 107-112. (pdf_file) (ps_file) Conference paper
212 2004c “Comparing Four Classes of Torus-Based Parallel Architectures: Network Parameters and Communication Performance,” B. Parhami and D.-M. Kwai. Mathematical and Computer Modeling, Vol. 40, Nos. 7-8, pp. 701-720, October 2004. (pdf_file) Journal paper
     

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Item Year Title and Co-Authors Publication or Publisher  (Link) Category
213 2005 Computer Architecture: From Microprocessors to Supercomputers. Oxford University Press, New York, 556 + xx pp., 2005, ISBN 0-19-515455-X.  Detailed information, errata, and complete PowerPoint presentations are available at the Web page for Parhami's architecture book Book
214 2005a Instructor's Solutions Manual for Computer Architecture: From Microprocessors to Supercomputers. Oxford University Press, New York, 88 + vi pp., 2005, ISBN 0-19-522213-X. Includes a CD with PowerPoint presentations, ISBN 0-19-522219-9. Book supplement
215 2005b “Some Mathematical Properties of Cayley Digraphs with Applications to Interconnection Network Design,” W.J. Xiao and B. Parhami. International Journal of Computer Mathematics, Vol. 82, No. 5, pp. 521-528, May 2005 (appeared on-line in March). (pdf_file) Journal paper
216 2005c “Chordal Rings Based on Symmetric Odd-Radix Number Systems.” Proc. International Conf. on Communications in Computing, Las Vegas, NV, June 27-30, 2005, pp. 196-199. (pdf_file) Conference paper
217 2005d “Application of Perfect Difference Sets to the Design of Efficient and Robust Interconnection Networks,” B. Parhami and M. Rakov. Proc. International Conf. on Communications in Computing, Las Vegas, NV, June 27-30, 2005, pp. 207-213. (pdf_file) Conference paper
218 2005e Diameter Formulas for a Class of Undirected Double-Loop Networks,” B. Chen, W.J. Xiao, and B. Parhami. Journal of Interconnection Networks, Vol. 6, No. 1, pp. 1-15, March 2005 (published in July). (pdf_file) Journal paper
219 2005f Weighted Two-Valued Digit-Set Encodings: Unifying Efficient Hardware Representation Schemes for Redundant Number Systems, G. Jaberipur, B. Parhami, and M. Ghodsi. IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 52, No. 7, pp. 1348-1357, July 2005. (pdf_file) Journal paper
220 2005g Perfect Difference Networks and Related Interconnection Structures for Parallel and Distributed Systems,” B. Parhami and M. Rakov. IEEE Transactions on Parallel and Distributed Systems, Vol. 16, No. 8, pp. 714-724, August 2005. (pdf_file). Journal paper
221 2005h “Performance, Algorithmic, and Robustness Attributes of Perfect Difference Networks,” B. Parhami and M. Rakov. IEEE Transactions on Parallel and Distributed Systems, Vol. 16, No. 8, pp. 725-736, August 2005. (pdf_file) Journal paper
222 2005i The Hamiltonicity of Swapped (OTIS) Networks Built of Hamiltonian Component Networks. Information Processing Letters, Vol. 95, No. 4, pp. 441-445, August 31, 2005. (pdf_file) Journal paper
223 2005j Voting: A Paradigm for Adjudication and Data Fusion in Dependable Systems. Chapter 4 in Dependable Computing Systems: Paradigms, Performance Issues, & Applications, ed. by H.B. Diab and A.Y. Zomaya, Wiley, 2005, pp. 87-114. (pdf_file) Invited book chapter
224 2005k Swapped Interconnection Networks: Topological, Performance, and Robustness Attributes. Journal of Parallel and Distributed Computing, Special Issue on Design and Performance of Networks for Super-, Cluster-, and Grid-Computing, Vol. 65, No. 11, pp. 1443-1452, November 2005. (pdf_file) Journal paper
225 2006 Cayley Graphs as Models of Deterministic Small-World Networks,” W.J. Xiao and B. Parhami. Information Processing Letters, Vol. 97, No. 3, pp. 115-117, February 14, 2006. (pdf_file) Journal paper
226 2006a “An Efficient Universal Addition Scheme for All Hybrid-Redundant Representations with Weighted Bit-Set Encoding,” G. Jaberipur, B. Parhami, and M. Ghodsi. Journal of VLSI Signal Processing, Vol. 42, No. 2, pp. 149-158, February 2006. (pdf_file) Journal paper
227 2006b Further Properties of Cayley Digraphs and Their Applications to Interconnection Networks,” W.J. Xiao and B. Parhami. Proc. of the 3rd Conf. on Theory and Applications of Models of Computation, Beijing, May 15-20, 2006, Lecture Notes in Computer Science, Vol. 3959, ed. by Y. Cai, S.B. Cooper, and A. Li, Springer-Verlag, pp. 192-197. (pdf_file) Conference paper
228 2006c Fault-Tolerant Reversible Circuits. Proc. of the 40th Asilomar Conf. on Signals, Systems, and Computers, Pacific Grove, CA, October 29 to November 1, 2006, to appear in spring 2007. (pdf_file) Conference paper
229 2006d Internode Distance and Optimal Routing in a Class of Alternating Group Networks,” B. Chen, W. Xiao, and B. Parhami. IEEE Transactions on Computers, Vol. 55, No. 12, pp. 1645-1648, December 2006. (pdf_file) Journal paper
jcse 2006? “A Class of Odd-Radix Chordal Ring Networks.” CSI Journal on Computer Science and Engineering, to appear. (pdf file of the final ms) Journal paper
cds 2007 Stored-Transfer Representations with Weighted Digit-Set Encodings for Ultrahigh-Speed Arithmetic,” G. Jaberipur and B. Parhami. IET Proceedings on Circuits, Devices, and Systems, Vol. 1, No. 1, pp. 102-110, February 2007. (pdf_file) Journal paper
dpdn 2007? “Distributed Interval Voting with Node Failures of Various Types.” Proc. of the 12th IEEE Workshop on Dependable Parallel, Distributed, and Network-Centric Systems, March 2007. (pdf_file) Conference paper
tpds 2007 A Group Construction Method with Applications to Deriving Pruned Interconnection Networks,” W. Xiao and B. Parhami. IEEE Transactions on Parallel and Distributed Systems, Vol. 18, No. 5, pp. 637-643, May 2007. (pdf_file) Journal paper
dam 2007? Further Mathematical Properties of Cayley Digraphs Applied to Hexagonal and Honeycomb Meshes,” W.J. Xiao and B. Parhami. Discrete Applied Mathematics, to appear in 2007. (pdf file of the final ms) Journal paper
jcss 2007? Structural Properties of Cayley Digraphs with Applications to Mesh and Pruned Torus Interconnection Networks,” W.J. Xiao and B. Parhami. International Journal of Computer and System Sciences, Special Issue on Network-Based Computing, to appear in 2007. (pdf file of the final ms) Journal paper
Integ 2007? “Constant-Time Addition with Hybrid-Redundant Numbers: Theory and Implementations,” G. Jaberipur and B. Parhami. Integration: The VLSI Journal, to appear. (pdf file of the final ms) Journal paper

      

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Dr. Behrooz Parhami, Professor

                     Office phone: +1 805 893 3211
E-mail: parhami@ece.ucsb.edu                 Messages: +1 805 893 3716
Dept. Electrical & Computer Eng.                  Dept. fax: +1 805 893 3262
Univ. of California, Santa Barbara                Office: Room 5155 Eng. I
Santa Barbara, CA 93106-9560 USA                      Deliveries: Room 4155 Eng. I