"Navigating the Perfect Storm: Trends in Functional Verification"

Harry Foster, Chief Scientist for Mentor Graphics' Design Verification Technology Division

February 9th (Monday), 10:00am
Engineering Science Building (ESB), Rm 1001

Between 2006 and 2014, the average number of IPs integrated into an advanced SoC increased from about 30 to over 120. In the same period, the average number of embedded processors found in an advanced SoC increased from one to as many as 20. However, increased design size is only one dimension of the growing verification complexity challenge. Beyond this growing functionally phenomenon are new layers of requirements that must be verified. Many of these verification requirements did not exist ten years ago, such as multiple asynchronous clock domains, interacting power domains, security domains, and complex HW/SW dependencies. Add all these challenges together, and you have the perfect storm brewing. This talk introduces today’s trends and challenges in SoC design and then discusses emerging verification strategy to navigate the perfect storm.

About Harry Foster:

photo of harry foster Harry Foster is Chief Scientist for Mentor Graphics' Design Verification Technology Division. He holds multiple patents in verification and has co-authored six books on verification. Harry was the 2006 recipient of the Accellera Technical Excellence Award for his contributions to developing industry standards, and was the original creator of the Accellera Open Verification Library (OVL) standard.

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