"Fabrication Process, Performance and Reliability of 0.4 um gate AlGaN/AlN/GaN HEMT on 4” SI-SiC substrate"

Sangmin Lee, CTO, GaN HEMT HPA, Wavice, Korea

July 22nd (Monday), 3:00pm
Engineering Science Building (ESB), Room 2001

photo of sangmin leeThe fabrication process of AlGaN/AlN/GaN HEMT with 0.4 um gate length on 4 inch semi-insulating SiC substrates have been developed in a production ready manufacturing facility in Korea. Though GaN HEMT R&D has been tried in graduate schools and government research institutes about 10 years ago in Korea, this is the first time in a production platform. The fabrication process includes Si+ ion implanted recess etched ohmic contact, void free Au electro-plated source connected filed plate (SCFP), N- ion implanted isolation, ICP etched through hole via directly to the source ohmic contact, and 85 um thick SiC substrate after grinding, etc. With the SCFP, the peak electric field under the gate is reduced and thus it is expected to have enhanced breakdown voltage, hot electron induced electron trapping, and long-term reliability. However, due to the topology of the gate area, evaporated SCFP metal shows cracks and voids. To improve the mechanical integrity of the SCFP layer, electro-plating technique has been applied. Uniform and void free SCFP is confirmed by SEM cross section. Detailed description of the fabrication process, DC/RF performance and reliability test results will be discussed.

About Sangmin Lee:

2015 ~ : CTO, GaN HEMT HPA, Wavice, Korea 2010 ~ 2015 : Research Scientist, GaN HEMT, Cree 2006 ~ 2010 : Sr Device Engineer, GaN HEMT, RFMD 2002 ~ 2006 : Sr Process Eng, GCS, InP DHBT 2000 ~ 2002 : Researcher, InP DHBT, ECE dept, UC Santa Barbara 1996 ~ 1998 : Researcher, Photonic integrated circuits, ETRI, Korea 1996 – Ph. D in Solid State Physics at Sogang Univ, Korea

Hosted by: Professor Mark Rodwell, ECE