Mixed Signal Electronics

Spring 2005


Course Syllabus and Outcomes

Link to RBR on line

Lecture Notes

Lecture 1: Technology for Mixed Signal ICs

Lecture Notes 2: Track and Hold Circuits

Lecture Notes 3: Digital to Analog Converters

Lecture Notes 4: Analog to Digital Converters - part 1

Lecture Notes 5: Analog to Digital Converters - part 2

Lecture Notes 6: Analog to Digital Converters - part 3

Lecture Notes 7: Introduction to PLLs

Lecture Notes 8: PFD/CP 3rd order PLL

DLL reference

Clock and Data Recovery Lecture Notes

Sources of error in digital communications - bit error rate


Homework Assignment Links

Homework assignment #1: due April 11 @ 5pm

Homework assignment #2: due April 18 @ 5pm

Homework assignment #3: due May 4 @ 5pm


Useful Links

Link to RBR on line


Useful References

References on Track-Hold

Lim and Wooley, "A High Speed Sample and Hold Technique using a Miller Hold Capacitor," JSSC Vol.26, #12, Dec. 1991

References on DACs

Bugeja et al, "A 14-b, 100MS/s CMOS DAC Designed for Spectral Performance," JSSC Vol.34, #12, Dec. 1999

References on ADCs

C. Mangelsdorf, “A 400-MHz Input Flash Converter with Error Correction,” IEEE JSSC Vol.25,#1, pp184-191, Feb 1990.

J. van Valburg and R. van de Plassche, “An 8-b 650 MHz Folding ADC,” vol 27, #12, pp. 1662-6, Dec 1992

A. Venes, R. Van de Plassche, “An 80 MHz, 80 mW, 8-bit Folding ADC with Distributed Track Hold Preprocessing,” IEEE JSSC, Vol. 31, #12, pp. 1846 – 1853, Dec. 1996.

J. Mulder, etal.,”A 21mW 8-b 125 MS/s ADC in 0.09 mm2 0.13 um CMOS,” IEEE JSSC, Vol. 39, #12, pp. 2116-2125, Dec. 2004.

References on High Speed Bipolar Circuits

Rein and Moller: JSSC96: Design Considerations for Very HS Si-Bipolar ICs Operating up to 50 GHz

References on Jitter

Jitter in Ring Oscillators

Maxim App Note: Jitter in Digital Communications Systems - Part 1

Maxim App Note: Jitter in Digital Communications Systems - Part 2

Reference on Delay Locked Loops

A 155 MHz Clock Recovery Delay and Phase Locked Loop

Overview of Delay Locked Loops


ADS Tutorial files

ADS tutorial #1: basic operations

How to make a subnetwork in ADS

ADS example files from ECE225(spring 2003) (.zap archive file)



ADS MOS BSIM model parameters for 0.18, 0.25,and 0.35um MOSFETs


How to use the MOS device in ADS

HSPICE MOS BSIM model parameters for 0.18um MOSFETs

0.18 um NMOS

0.18 um PMOS


MOSIS measured wafer parameters for TSMC 0.18um Mixed Mode CMOS run


To download on Internet Explorer:

.zap  is an archive file format for ADS.  You must uncompress it with the unarchive project command in the ADS main window file menu.



Device Characteristic Plots

Plots of 0.25 um MOSFET I-V characteristics


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