University of California,
Santa Barbara
Department of Electrical and Computer Engineering
Digital Design Principles
ECE 152A - Summer 2009
Instructor: Dr. John M. Johnson
Schedule:Monday and Wednesday
12:30 - 1:50 p.m.
North Hall 1109
Lab TR 500-750PM HFH 1124
Lab MW 600-850PM HFH 1124
Lab TR 200-450PM HFH 1124
Nilesh Modi (nilesh@ece.ucsb.edu)
Hosein Mahjoubi (hosein_mahjoubi@umail.ucsb.edu)
Sheng-Luen Wei (swei@umail.ucsb.edu)
Prerequisites: ECE 15 or 15A or Computer Science 30 with a minimum grade of C- in each course; open to electrical engineering, computer engineering, and computer science majors only. Lecture, 3 hours; laboratory, 6 hours.
Design of synchronous digital systems: timing diagrams, propagation delay, latches and flip-flops, shift registers and counters, Mealy/Moore finite state machines, Verilog, 2-phase clocking, timing analysis, CMOS implementation, S-RAM, RAM-based designs, ASM charts, state minimization.
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Last Updated: August 18, 2009