ECE 152A - Winter 2009

University of California, Santa Barbara
Department of Electrical and Computer Engineering

Digital Design Principles

ECE 152A - Winter 2009

Prof. Volkan Rodoplu

Lectures: Monday/Wednesday 3:30 - 4:45 pm at LSB 1001.

Professor's Office hours: 5:00 - 6:00 PM, Mondays and Wednesdays,

in Room 4113, Harold Frank Hall; starting January 12, 2009.

Syllabus

Midterm Exam: in class, see course calendar in Syllabus

Final Exam: Look up in the Course Offerings schedule of final exams.

Announcements

03/02/2009: 'A group is missing their FPGA board. If you have picked up this board by mistake, please contact the TA's

03/02/2009: Final Exam is on Saturday, March 21st, from 12:00pm ~ 3:00pm, at LSB 1001

03/02/2009: For HW5, please drop problem 29, 30 in the course reader and the problem from the final exam of Winter 2005. That is, for HW5, only two problems stay. They are problem 32 and problem 33 in the course reader.

03/02/2009: The due day of HW4 is changed to March 13th.

03/02/2009: The final checkout of Lab5 is extended to 2:00pm on March 13th. TAs will hold a lab section between 12:00pm~2:00pm in the digital lab on March 13th. Anybody can check out lab5 in that section. People who cannot finish Lab5 by 2:00pm will get points off.

02/04/2009: To void the conflict with ECE153B which is from 4-7pm on Wednesdays, Nathan's office hours change to Monday 2-3:30pm, starting next week.

02/04/2009: Please follow the policy that: (1) Do not use the DigiLab during ECE 153B, and (2) Do not use the DigiLab during other lab sections of ECE 152A

02/02/2009: HW#2 description was confusing. Please do HW#2, according to this: For HW # 2: PLEASE SKIP THE FOLLOWING THREE PROBLEMS: B & V PROBLEM 7.32, AND PROBLEM # 15 AND PROBLEM # 16 IN THE COURSE READER

01/22//2009: In lab2, you need to use Quartus to download your verilog code to FPGA. Here is a brief instruction QuartusTutorial

01/13/09: Herbert Sun, a member of Tau Beta Pi, offers free tutoring for ECE 152A in Trailer 698 (the trailer outside of HFH) on Mondays 1:00 PM - 2:00 PM, and Mondays 3:00 - 3:30 PM. This is an additional resource to have questions answered in this course regarding the course material.

01/07/09: The Pre-lab for Lab # 2 has been dropped. There will be NO pre-lab due January 26 for Lab # 2. Hence, this lab has no written part to be graded. We will only grade your demo on February 2, 2009, at check-out for Lab # 2.

01/07/09: Please note that some problems have been dropped from each homework. These problems to skip have been noted in the homework section below, under each assignment. For example, it says "Skip Problems # 3, # 6, # 8" for HW 1.

01/06/09: "Lab Overview" PPT is ready to download. Here is the link LabOverviewPPT

01/05/09: Please read the UCSB/ECE FPGA Board web page: http://vader.ece.ucsb.edu/digilab-fpga/

01/05/09: For Lab # 1: Please note that NOT all TTL parts are available. See the hyperlink below on ECE Shop: List of Available Parts (under Lab Handouts). Only these chips are available in the lab, so plan your TTL implementation accordingly.

01/05/09: Please use TTL (7400 series) for your labs (not CMOS 4000 series parts!).

01/05/09: For the pre-labs, you need to hand in only 1 solution per team (put both team members' names on your solutions.)

01/05/09: Check in the ECE Shop (Room: 1160, Harold Frank Hall; M-F: 8:00-12:00 and 1:00-4:00) to get the access cards for the Digital lab.

Course Reader

(Homework is assigned from the reader.)

CourseReader_Problems 10 to 14

CourseReader Problems 18

CourseReader Problems 19-20

CourseReader Problems 32-33

Homework - Solutions

The homework is due in the ECE 152A Homework Box on the 3rd floor of Harold Frank Hall.

(After you exit the elevator, go straight through the double doors across from you. The homework box is outside after you go through the double doors.)

HW # 1

(due January 30, 2009; 2:00 PM)

For HW # 1, PLEASE SKIP

PROBLEMS # 3, # 6, # 8.

DO THE REST OF THE PROBLEMS.

HW # 2

(due February 6, 2009; 2:00 PM)

For HW # 2: PLEASE SKIP THE FOLLOWING THREE PROBLEMS: B & V PROBLEM 7.32, AND PROBLEM # 15 AND PROBLEM # 16 IN THE COURSE READER

DO THE REST OF THE PROBLEMS.

HW # 3

(due February 27, 2009, 2:00 PM)

For HW # 3: PLEASE SKIP PROBLEMS 1-3 (the B&V textbook problems). Also, SKIP Problem # 24 in the course reader. Do the REST of the Problems, which are from the Course Reader.

(Start early!)

HW # 4

(due March 13, 2009, 2:00 PM)

HW # 5

For HW#5: ONLY PROBLEM 32 AND 33 IN THE COURSE READER STAY. Please ignore other three problems.

(due March 13, 2009; Friday, 2:00 PM)

Grading Guidelines for Homeworks and Labs

Lab Handouts
Lab Schedule

Print out Data Sheets for each lab

ECE Shop: List of Available Parts

UCSB/ECE DigiLab FPGA Board Information

ALL PRE-LABS DUE ARE AT THE BEGINNING OF YOUR LAB.

THE CHECK-OUTS FOR DEMOS MUST BE DONE WITHIN FIRST 1 HR. OF THE LAB SECTION.

All the lab dates below are for "week of" the date indicated,

at the beginning of your lab section.

Lab #1

Nothing is due: January 12, 2009 (but highly encouraged to complete as much of Steps # 1 and # 2 as possible.)

Pre-lab due: (Steps # 1 and # 2 due) January 19, 2009. [Demo of Steps # 3 and/or # 4 encouraged, but not required.]

Check-out (Steps # 3 and # 4): January 26, 2009

Lab #2

Pre-lab: NO PRE-LAB DUE January 26, 2009. (We have dropped the pre-lab, so please skip any written section. Only the final demo on February 2, 2009 will be graded.)

Check-out: February 2, 2009

Lab #3

Lab starts: February 2, 2009

Check-out: February 9, 2009

(Hint: Use teamwork to manage the wiring to get it done by the deadline.)

Lab # 4 Lab-4 help Sample C program cbw.h cbw32bc.lib lab4_verilog Sample-Testbench cbw32.dll

Lab starts: February 09, 2009

(There is no pre-lab for this lab.)

Part 1 due: February 16, 2009

Parts 2, 3 and 4 due: February 23, 2009

Lab #5 template.v

Lab starts: February 23, 2009

(There is no pre-lab for this lab.)

Parts 1 and 2 due: March 1, 2009

Parts 3 and 4 due: March 13, 2009

Lab Sections and TA Office Hours
Harold Frank Hall, Room 1124 (DigiLab)

You may go to the office hours of any TA (not just the TA of your lab section)

Wei Tang

w_tang@umail.ucsb.edu

Lab Section: Tuesday 7:00PM ~ 9:50PM

Office hours: Tuesday 5:30PM ~ 7:00PM

Xin Yang

xinyang@umail.ucsb.edu

Lab Section: Thursday 7:00PM ~ 9:50PM

Office hours: Thursday 5:30PM ~ 7:00PM

Nathan Eldridge

neldridge@umail.ucsb.edu

Lab Section: Wednesday 7:00PM ~ 9:50PM

Office hours: Monday 2:00PM ~ 3:30PM

Acknowledgments: We would like to thank all the professors, TA's and lecturers, who have created, worked on, used, and revised the laboratories for this course. A partial list is as follows: Prof. Roger C. Wood, Christian Schmidt, Prof. Kaustav Banerjee, James Rosenthal, Brian Simolon, Dr. John M. Johnson, Prof. Volkan Rodoplu, Aida Todri, Nilesh Modi, Vishal Mehta, James Tandon. We would also like to thank Dr. John M. Johnson for preparing lecture note slides for this course, and for his continuing contributions during the summer quarters.

Practice Exams

ECE 152A Midterm Exam Fall 2004

ECE152A_Midterm Exam Winter 2005

ECE 152A Midterm Exam Fall 2005

ECE 152A Midterm Exam Fall 2007

ECE 152A Midterm Exam Winter 2008

ECE 152A Final Exam Fall 2004

ECE 152A Final Exam Winter 2005

Practice Problems for FSM Design: PS1 PS2 PS4

Lecture Notes (very rough)

(The following are handwritten lecture notes that I made while preparing for the lectures. These are very rough compared to the exposition in class, and were mostly notes to myself. However, I am providing them here in case you find them useful.)

. Lecture 5-6 Addendum

. Lecture 7

. Lecture 8-9

. FSM Examples

. Mealy/Moore Examples

. Blocking vs. Non-blocking Assignments