http://www.ece.ucsb.edu/courses/ECE122/122_F22Banerjee/ https://tinyurl.com/F22-ECE122A

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- ECE 122A - VLSI Principles
   University of California, Santa Barbara, Fall Quarter 20
22

- Instructor: Prof. Kaustav Banerjee
   kaustav (at) ece.ucsb.edu   

- Teaching Assistant: Ankit Kumar
   ankitkumar (at) ece.ucsb.edu
   Office: HFH 2164

- Lecture Location:  ESB 1003 (Cooper Lab)
- Lecture Time: Tue. & Thu. 3:30-4:45 PM

- Lab Location: ENGR1 1140 (ECI Lab)
-
Lab Timings: Tue. 8:00-10:50 AM

- Professor Office Hour Location: Room 4151, Harold Frank Hall
- Professor Office Hour Time:  (Appointment by email)

- TA Office Hour Location: HFH 2164
- TA Office Hour Time: Wednesday 3:30-4:30 PM

- More course info

- Midterm (2021) Paper (Solutions)


Textbook
CMOS VLSI DESIGN
4th Edition

 

 


- Lecture 01 (9/22/2022) - Introduction
- Lecture 02 (9/27/2022) - History of transistors and ICs/Switch-level understanding of static CMOS circuits
- Lecture 03 (9/29/2022) - Switch - Level Logic Circuits
- Lecture 04 (10/4/2022) - Review of Semiconductor Physics
- Lecture 05 (10/6/2022) - IC Fabrication (Video)
References:
Intel, "From Sand to Circuit"
Intel, "From Sand to Silicon"
Video 1 - Silicon Run 1
Video 2 - Silicon Run II
- Lecture 06 (10/11/2022) - P/N Junctions and MOS Structure
- Lecture 07 (10/13/2022) - MOS Physics and Operation
- Lecture 08 (10/18/2022) - Dynamic Behaviour of MOSFET and CMOS Inverter
- Lecture 09 (10/20/2022) - Inverter
- Lecture 10 (10/25/2022) - Inverter Sizing and Logical Effort
- Lecture 11 (10/27/2022) - Combination Logic Circuit
- Lecture 12 (11/1/2022) - Adders and Datapath
- Lecture 13 (11/8/2022) - Interconnects
- Lecture 14 (11/10/2022) - Ratioed, Pass Transistor and Dynamic Logic
- Lecture 15 (11/15/2022) - Sequential Logic
- Lecture 16 (11/17/2022) - Memory-I
- Lecture 17 (11/22/2022) - Memory-II


- Homework 1 (Due on Monday, 10/03/2022, 5:00 PM) - Review of Digital Design
Solution
- Homework 2 (Due on Tuesday, 10/11/2022, 5:00 PM) - CMOS and Pass Transistors
Solution
- Homework 3 (Due on Friday, 10/21/2022, 5:00 PM) - IC Fabrication, P/N Junctions and MOSCAP
Solution
- Homework 4 (Due on Friday, 10/28/2022, 5:00 PM) - MOSFET and CMOS Inverter
Solutions
- Homework 5 (Due on Friday, 11/4/2022, 5:00 PM) - Device Parasitics, CMOS Inverter and Logic Gate Sizing
Solutions
- Homework 6 (Due on Friday, 11/18/2022, 5:00 PM) - Interconnects, Dynamic Logic, Ratioed Logic and Pass Transistor Logic
Solutions
- Homework 7 (Due on Monday, 11/28/2022, 5:00 PM) - Sequential Logic, Adder, Memory
Solutions
- Lab 1 (Due on Thursday, 10/06/2022, 5:00 PM) - Environment setup and tool practice
- Lab 2 (Due on Thursday, 10/13/2022, 5:00 PM) - CMOS circuit simulation with HSpice
- Lab 3 (Due on Thursday, 10/20/2022, 5:00 PM) - Single-stage logic gate CMOS layout
- Lab 4 (Due on Thursday, 10/27/2022, 5:00 PM) - Inverter, CMOS sizing and delay
Additional files for Lab 1

  180nm_bulk.txt
  bash_configure
  inv.sp

- You will need to use these software: (Manuals provided)
- HSpice (Circuit Netlist Simulation) HSpice Manual
- CosmosScope/AvanWaves
   (Waveform viewer for Linux/Windows)
- MMI MAX
- MMI SUE

CScope Manual
AvanWaves Manual
MAX Tutorial
SUE Tutorial

Project Reference:
  LVS Technology for the Intel(R) Pentium(R) 4 Processor on 90nm Technology

- Final Project

- PART 0
  Work either individually or in a group of two.
  Please sign up in the Group List.

- PART 1 Review on LVS Technology (Due on Friday 11/18/2022 5:00 PM)

- PART 2 (Due on Tuesday 11/22/2022 5:00 PM)

- PART 3 (Due on Sunday 11/27/2022 5:00 PM)

- Final Report (Due on Sunday 12/4/2022 11:59 PM)

- An Introduction to GNU/Linux Command Shell:
  http://vic.gedris.org/Manual-ShellIntro/1.2/ShellIntro.pdf

- For a better understanding of device physics, please refer to the supplementary textbook:
   Modern Semiconductor Devices for ICs (1st Edition), by Chenming Hu

- Midterm Solutions

 

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