ECE137B

 

Spring 2014

 

DO NOT GO TO THE SCHEDULED LAB HOURS during the first week of classes. The laboratory/design content of the class is run on an independent basis. Design projects are assigned and a due date is given. Students work in the lab constructing and testing their designs, working in the lab at whatever time they find most suitable to work.

 

Hit the refresh button to make sure you see recent updates to HW, labs, etc

 

Sami will hold office hours

      Monday June 9 noon-2PM
      Tuesday June 10 noon-2PM

Rodwell: review session Friday June 6, 2014  06:00PM -09:00PM in regular lecture hall

 

Note change: Checkoff #2 design review document now due:  5/1/2014

 

Instructor.. 2

Lectures. 2

Syllabus and Outline.. 2

Exams. 2

Review Sessions. 2

Teaching Assistants. 2

Class Preparation.. 2

Lab Hours and Design Projects. 2

Lab Access During Lab  Periods. 3

Problem Sets: Spring 2014. 3

Picking Up Your Graded Assignments. 4

Homework solutions: 4

Lab Assignments. 5

Lab checkoff schedule. 5

Textbook.. 5

Lecture Notes. 6

Weekly Reading.. 6

Resources. 6

Old Exams and Solutions. 7

Transistor and IC Datasheets: 7

*********************************************************

Instructor

Prof. Mark Rodwell

Office Hrs:   Wednesdays 4-5PM, Fridays 11AM-noon, ESB Room 2205F.

Lectures

Tuesdays,  Thursdays 5:00pm - 6:15pm  PSYCH 1902

Syllabus and Outline

Syllabus  outline

Exams

Midterm exam: Tuesday, April 29, during lecture time.
Dead week:  March 10-14

Final Exam: Wednesday, June 11, 7:30 - 10:30 p.m.

(from http://registrar.sa.ucsb.edu/cal2014.aspx   ,

http://registrar.sa.ucsb.edu/finals-spring.aspx     )

Review Sessions

To cover dates I must travel it is expected that some additional lectures will be scheduled. I will also schedule additional reviews near the times of the later 2 labs, and the mid-term and final exams.  I will be polling the class for suitable times to do this.

 

Date

Time

Location

Subject / Objective

4/11/2014

6-9PM

PHELPS 3523

Lab project discussion/review.

45min project 1
45min project 2

45min project 3

 

Teaching Assistants

TA

Email

office hours

Location

Huang, Duanni

duanni@umail.ucsb.edu

6:30-7:30 Tues

The lab !

Ortoleva, Sami

sortoleva@umail.ucsb.edu

2:30-3:30 Wed.

The lab !

Albayrak, Merve

mervealbayrak@umail.ucsb.edu

2:30-3:30 Tues

The lab !

Please note that these office hours will be replaced (will not be held ) during weeks when the TAs are holding office hours in the lab. See below

 

Class Preparation

Comments about class preparation.

Lab Hours and Design Projects

The laboratory/design content of the class is run on an independent basis. Design projects are assigned and a due date is given. Students work in the lab, working in groups of two (not three) constructing and testing their designs, working in the lab at whatever time they find most suitable to work.

 

During the week of that each lab project is due, the above TA hours will *not* be held. 

Instead, the TAs will be in the lab to provide you with guidance in the lab, at hours posted both here and on the lab door.

 

Dates and times when TA hours will be held in  the lab.  Checkoff times=*

Monday

Tuesday

Wednesday

Thursday

Friday

 

April 8
6:30-7:30MA

April 9

10AM-noon S.O.

April 10
7-9PM  M.A.

April 11

3-5PM D.H.

April 14
5-7PM SO

April 15
6:30-8:30PM MA

April 16
6:15-9:15PM DH

April 17
6:30-9.30 SO
7:00-10:00DH

April 18
*4-11PM SO

*4-11PM MA
*4-11PM DH

April 29

6:30-9:30PM MA

April 30

6:30-9:30PM  DH

May 1

6:30-9:30PM MA

May 2

5-8PM SO

May 5

5-8PM MA

May 6

6:30-9:30PM SO

May 7

5-8PM SO

May 8

6:30-9.30 DH
6:30-9.30PM SO

May 9

6:30-9.30 MA
6:30-9.30PM DH

May 12

*4-12PM DH

*4-11PM MA
*4-11PM SO

May 19

 May 20

6:30-7:30 DH

May 21

2:30-3:30 SO
6:30-8:00SO

May 22
6:30-8:00DH

May 23
6:30-8.00 MA

May 26

(holiday)

May 27
6:30-9.30 DH

May 28

6:30-9.30 SO

May 29

6:30-9.30 DH

May 30

6:30-9.30 MA

June 2

6:30-9.30 SO

June 3

6:30-9.30PM DH
6:30-9.30PM MA

June 4

*4-11PM SO

*4-11PM DH
*4-11PM MA

 

 

 

Lab Access During Lab  Periods

Checkoffs will be in the lab, and will be by appointment. A signup sheet for lab checkoffs will be distributed in lecture. Please see the TAs if you must change your appointment time.   During the checkoff periods, the TAs are not available to provide you with guidance,  and the lab is will be closed except to those checking off. This means that you should plan to have your lab fully tested and working the day before.

 

Problem Sets: Spring 2014

Problem sets are due 5PM in the class homework box in Harold Frank Hall

#

week

what

due

files

1

2

 nodal analysis, frequency & transient response, poles/zeros.

4/9/14

assignment:
ece137b_ps1_2014.pdf

updates:

2

3

nodal analysis, frequency & transient response, poles/zeros.

4/16/14

 

assignment:

ece137b_ps2_2014.pdf

updates:

3

4

frequency/transient response of CB and CG stages

4/23/14

assignment:

ece137b_ps3_2014.pdf

updates:

4

6

frequency/transient response of CC and CD stages

5/7/14

assignment:
ece137b_ps4_2014.pdf

updates:

5

7

Frequency response of  multistage amplifiers & op-amps

5/14/14

assignment:

ece137b_ps5_2014.pdf

updates:

6

8

Basics of negative feeback and stability.

5/21/14

assignment:

ece137b_ps6_2014.pdf

updates:

7

9

Putting it all together: finding op-amp poles and computing op-amp phase margin

5/28/14

assignment:

ece137b_ps7_2014.pdf

updates:

 

Missing parameters in assignments: Often a problem statement will omit to give certain parameter values. In those cases, use default values, as below.  In some problems, you are asked to use data sheet values for device parameters. In those cases, be certain that the data is not on the data sheet before using these default values.

channel output conductance parameter, lambda (MOSFETS)

0 in DC calculations

1/(10 V) in AC calculations

MOS channel mobility

400 cm^2/(volt-second) NMOS, 200 for PMOS

MOS saturation drift velocity

10^7 cm/s NMOS, 5*10^6 cm/s PMOS

MOS gate length

90 nm

gate oxide thickness

1 nm

MOSFET threshold voltage

+0.3 V (NMOS), -0.3V (PMOS)

Va, Early voltage (BJTs)

100 V.

beta (current gain of BJTs)

100

Vce(sat) (BJTs)

0.5 V

Vbe(on)  (BJTs)

0.7 V

Ise of BJTs in current mirrors

matched if not specified otherwise

vsatCoxWg  (or mCoxWg /Lg)and Vth of MOSFETs in current mirrors

 

 

Picking Up Your Graded Assignments

Graded HW and Lab projects are obtained from the TAs. Please see them during either office hours or during their lab hours.

Homework solutions:

Solutions are here.

Lab Assignments

You have the choice of doing one of three possible lab projects.
Each project is a major project, and will take the whole quarter. To keep you on schedule, there will be three checkoff phases.

Project #

Name

files

1

Digital audio power amplifier

assignment

Matlab files:
shorter_pwm_plus_feedback.m: fast running less accurate pulse width simulation

longer_pwm_plus_feedback.m slow running more accurate pulse width simulation

raised_cos_baseband_filter2.m. sub-file needed for all simulations

hann.m sub-file needed for all simulations
power_ds.m delta-sigma simulation file

summary_PWM.pdf set of images from the PWM simulations

2

fast fiber optic link

assignment

hints

3

acoustic phased array

assignment

 

Lab checkoff schedule

what

when

first checkoff  phase

10% of points

design review: none
checkoff:  4/18/2014

report:    4/21/2014

updates:

second checkoff  phase

35% of points

design review document:  5/1/2014
checkoff:  5/12/14

report:    5/13/14

updates:

third checkoff  phase
55 % of points

design review document:  5/27/2014
checkoff:   6/4/2014

report:    6/6/2014

updates:

Check-offs are by appointment with the TAs

Guidelines on writing lab reports

Guidelines on building and testing projects

Design review contains: (1) statement of design goals, (2) circuit diagram, (3) calculations proving that the circuit will meet specifications.

Textbook

The main text for the class is the online lecture notes- these are available via the links below.

 

You will also need to have a quality analog IC design text. If you don't have one, the recommended text for this class is Sedra & Smith Microelectronic Circuits .

 

Other high-quality alternatives are  Fundamentals of Microelectronics, by Behzad Razavi, Microelectronic Circuit Design by  R.C. Jaeger and T.N. Blalock, or Analysis and Design of Analog Integrated Circuits, by Grey, Meyer, and Lewis. The Grey/Meyer/Lewis and Razavi texts, are more focused and have less added secondary material. These book can be purchased online from many vendors. Older editions have the advantage that used copies can be obtained at a lower price. Any of these books would be just fine.

 

Every textbook covers the material differently, as does the lecture notes. It helps to have several perspectives. 

Lecture Notes

Please read each note set before attending lectures. It will then be much easier to follow the lectures !

week

set

subject

comment

1

1

 Transistor high-frequency models

 

1

2

 Common source/emitter frequency response

 

2

3

 Emitter degeneration: approximate

 

2

4

 Ampl. LF/HF pulse response, dominant poles

 

3

5

 common gate/base frequency response

 

3

6

 method of time constants

 

4

7

 MOTC, source and emitter followers

 

4

8

 Multistage frequency response analysis

 

5

9

 Multistage frequency response analysis

 

6

10

 Multistage frequency response analysis

 

6

11

 Negative feedback

 

7

12

 Feedback & transfer functions

 

8

13

 Feedback stability criteria

9

14

 Feedback loop compensation

10

15

 Port impedance and feedback

very detailed..

10

16

 Feedback example

subtle

 

Weekly Reading

week

Sedra/Smith, 6th edition

Razavi

lecture notes

1

To be posted...

To be posted...

1,2

2

3,4

3

5,6

4

7,8,9

5

 

10,11,12

6

13,14

7

15, 16, 17

8

 

review, lab project

9

 

 

review, lab project

10

 

 

review, lab project

Read the text to get a different perspective on the material from the lecture notes.
If your book is not Razavi or Sedra/Smith, look at the notes, and find the similar section in the book.

 

Resources

material

comment

Transistor amplifier crib sheet

you can bring this to the exams.

High frequency amplifier crib sheet

 

op-amp design tutorial

dated, but seminal

testing operational amplifiers

hints for testing op-amps for design projects

semilog_paper.pdf

for making Bode plots

amplifier_gallery.pdf

 

opamp_comments.pdf

 

more_opamp_hints.pdf

 

resources\OA-21.pdf

Good general reference on op-amps

 

Old Exams and Solutions

year

mid-term

final

2002

mt_02_solution2.pdf

 

2006

137BMT2006a.pdf

 

2006

137BMT2006b.pdf

2007

137BMT2007a.pdf

2007

137BMT2007b.pdf

 

2001

ece137bfinal2001.pdf

 

2003

ece137bfinal2003a.pdf

 

2003

ece137bfinal2003b.pdf

 

2004

ece137bfinal_04a.pdf

 

2004

ece137bfinal_04b.pdf

 

2006

ece137bfinal_solution_2006b.pdf

 

2006

ece137b_final_solution_2006a.pdf

 

2007

ece137b_final_2007a.pdf

 

2007

ece137b_final_2007b.pdf

 

Transistor and IC Datasheets:

Type

link

comment

MOSFETs

 

 

small-signal matched pairs

ALD1101

ALD1102

ALD1105

ALD1106

ALD1107

good for general analog design at moderate frequencies.

small-signal arrays

ALD1116

small-signal array

ALD110800

low (near zero) threshold voltage.

medium-power

VN0104  VP0104

high current devices, good also as small-signal FETs at 1-100mA bias. At lower currents, the data sheet does not provide data, and a curve-tracer must be used

high-power

IRFU014_N-ch

IRFU9014_P-ch

Serve well as a complementary power output stage DC-100kHz.

Bipolar Transistors

 

 

small-signal

2n3904   2n3906

the data sheets give a spice Model with

tau_f and Ccb and Cje specified.

use the formulas

Ccb(Vcb)=Cjc / (1+Vcb/Vjc)^MJC

Cje(Vbe)=Cje/(1+Vbe/Vje)^MJE

medium-to-high-power

mje371  mje521

The datasheets for the power transistors are missing the ft and Ccb specifications.  These are:

ft = 3.0 MHz (IC = 250mA, VCE = 10 V) for both NPN and PNP

Cob = 100 pF (IE = 0, VCB = 10 V) for both NPN and PNP

matched pairs and arrays

THAT300

 

Operational-amplifiers

 

 

5 V op-amps (single-dual, quad)

ALD1702

ALD2702

ALD4702

low-voltage, precision op-amps

3MHz dual-supply op-amp

TL074

 

fast (80MHz) op-amp

AD8031_AD8032

 

High Speed Analog Comparators

 

 

 

AD790.pdf

Precision, expensive.

 

LM160.pdf

cheaper, Probably good enough

CMOS D-type flip flops

 

 

 

cd4013.pdf

sufficiently fast for the power delta-sigma adc

 

MM74HC74A.pdf

faster device for use in the fiber optic project

 

MM74HC175.pdf

amother fast flip-flop

CMOS XOR gate

 

 

 

MM74HC86.pdf

faster device for use in the fiber optic project

Fiber Optic Components

 

 

 

IFD91.pdf

LED

 

IFE98.pdf

PIN Photodiode