Aug 20 (Fri) @ 2pm: "Energy-Efficient High-Performance CMOS VLSI Design for Electronic-Photonic Integration and Biological Applications," Mitra Saeidi, ECE PhD Defense

Date and Time
Zoom Meeting - Meeting ID: 826 2168 7444 | Passcode: 381869


Data analysis, storage and communication has become a very important subject for research nowadays. Due to higher demand for data, power and area reduction have drawn more attention in recent research. We propose new system for data communication through optical links which is area and power efficient while maintains high performance. We also propose a new approach for biosensing which also focuses on area and power efficiency with better performance which enables analyzing huge amounts of data.

In the first part of this dissertation, a 1Tb/s transceiver system is introduced. This system is designed for microring resonator based links. Therefore, a wavelength locking system is also presented. The 1Tb/s transceiver with less than 90fJ/bit energy efficiency is implemented in 22nm FDSOI to achieve 5Tbit/(mm2) and 0.8Tbit/(mm2) densities. New system and circuit designs are proposed to achieve such low power and density at 1Tb/s. A 20 channel wavelength locking system is also designed and implemented in TSMC 65nm.

In the second part, we introduce biological sensors and sensor interfaces for biological applications. Nanopore sensors enable a wide range of sensors from DNA sequencing to polymer mass spectrometry by exploiting the resistive pulse technique. The small sensor signal and high-speed can make the electronics design challenging. We introduce the system design of a new high precision potentiostat. Our direct current-to-digital conversion is capable of sensing picoampere (pA) currents without a need for transimpedance amplifiers (TIAs). Our idea utilizes a ∆Σ modulator with one very important difference, current feedback via slope scaling. This feature allows us to utilize noiseless elements such as capacitors in the feedback loop to achieve high performance. We also present a direct current to digital 125µW, area efficient (0.042mm2) 81dB DR, 8KS/s current sensing ADC implemented in 45nm CMOS capable of sensing sub-pA currents. 


Mitra Saeidi received her M.Sc. degree in Electrical Engineering from Amirkabir University of Technology (Tehran Polytechnic), Tehran, Iran in 2014 . She is currently pursuing her Ph.D. in Electrical and Computer Engineering at the University of California, Santa Barbara.

Hosted by: Professor Luke Theogarajan

Submitted by: Mitra Saeidi <>