Jan 22 (Fri) @ 10:00am: "Architecture Supports and Optimizations for Memory-Centric Processing System," Peng Gu, ECE PhD Defense

Date and Time
Location
Zoom Meeting - Meeting ID: 714 713 6139 | Passcode: 123456

https://ucsb.zoom.us/j/7147136139

ABSTRACT:

For the past two decades, the scaling of main memory lags behind the advancement of computation in aspects of bandwidth and capacity. Conventional compute-centric architecture faces challenges to scale memory bandwidth due to the limitation of off-chip interconnect resources and the energy-inefficiency of long distance data movements. Also, the emerging big data workloads have increasing demand for higher memory capacity, which cannot be satisfied by traditional DRAM technology scaling.

In this talk, we will introduce our work on exploring memory-centric architectures and design optimizations for higher memory bandwidth and larger memory capacity. Three categories of memory-centric designs have been researched. First, the analog process-in-memory architecture merges computation logics inside memory arrays. It employs the in-situ computing capabilities of resistive memory arrays to eliminate data movements and benefit from massive data parallelism. Second, the digital process-near-memory architecture integrates computation units near memory arrays. The near-memory lightweight logics can utilize abundant bandwidth of the internal memory arrays while the optimizations maintain hardware programmability. Last, the enhanced memory design develops simulation framework for emerging memory technologies, which can greatly boost the memory capacity. Using both emerging non-volatile memory and 3D stacking memory technologies, we investigate four architectures and one simulation framework, covering a wide spectrum of application domains including deep learning, image processing, and high-performance parallel computing.

BIO:

Peng Gu is a PhD candidate in Computer Engineering advised by Professor Yuan Xie. His main research interests within computer architecture are process-in-memory / near-data-processing architecture, memory subsystem, and domain-specific accelerator design. He received her B.S. in Electronic Engineering at the Tsinghua University in 2015, and his M.S. in Electrical and Computer Engineering at the University of California, Santa Barbara in 2018.

Hosted by: Professor Yuan Xie

Submitted by: Peng Gu <peng_gu@ucsb.edu>