Jan 31 (Mon) @ 3:00pm: "Efficient In-DRAM Near-Bank Processing for Emerging Parallel Computing Workloads," Xinfeng Xie, PhD Defense
Parallel architectures and domain-specific accelerators have succeeded in improving the performance of emerging applications even under the slowdown of transistor scaling. Despite their success in the last decades, the performance gap between computation and memory bandwidth has widened as the memory bandwidth scaling-up can hardly catch up with the progress of processors. As a result, the performance improvements of data-intensive workloads encounter an obstacle, the so-called memory wall, from hardware architectures. In this talk, we will navigate through emerging processing-in-memory (PIM) architectures to overcome these obstacles. In particular, we focus on in-DRAM near-bank processing that brings compute-logic near memory banks to improve the effective memory bandwidth. In addition to hardware innovations, we identify the challenges of efficiently using these novel architectures and propose software optimizations, including compiler supports, for addressing these challenges. Our case studies and experimental results show that our holistic solutions based on in-DRAM near-bank processing architectures from hardware designs to software supports benefit a wide range of data-intensive workloads, thus they are promising for future deployment in computing platforms.
Xinfeng Xie received a B.S. degree from Peking University in 2017, and an M.S. degree from the Department of Electrical and Computer Engineering at the University of California, Santa Barbara in 2020. He is currently a Ph.D. candidate at the University of California, Santa Barbara working with Prof. Yuan Xie. His current research interests include developing emerging computer architectures, such as in-DRAM near-bank processing, and software supports for these emerging architectures.
Hosted by: SEAL Lab
Submitted by: Xinfeng Xie <firstname.lastname@example.org>