Mar 20 (Wed) @ 2:30pm: "Energy-Efficient Electronics Enabled by Two-Dimensional Van der Waals Materials," Kunjesh Agashiwala, ECE PhD Defense

Date and Time

Zoom Meeting –


In the relentless pursuit for energy-efficient electronics targeted for next-generation high-performance computing, artificial intelligence, and for realizing large-scale quantum computers, hardware platforms based on conventional electronic systems suffer from several fundamental challenges. This dissertation focuses on addressing these challenges using a new hardware platform based on two-dimensional (2D) layered materials, which, due to their unique electrical, thermal, and physical properties, can be judiciously exploited for revolutionizing these applications.

First, I talk about the benefits of using graphene as a prospective interconnect technology for the most aggressively scaled wiring dimensions in state-of-the-art ICs, which suffer from severe resistance increase and reliability challenges. I demonstrate the benefits of using graphene for designing sub-20 nm wires, comprising a unique CMOS-compatible graphene growth technique, followed by graphene interconnect fabrication, electrical and reliability characterization, and performance projections, that has established its advantages over conventional metals for next-generation energy-efficient electronics, and is being actively pursued by the industry. 

Second, I demonstrate the full potential of using graphene in designing high-performance inductors, where the high kinetic inductance of graphene can be uniquely exploited to address the various high-frequency challenges (such as skin effect, proximity effect, substrate coupling) encountered during GHz frequencies of operation. By developing a comprehensive model which captures the intricate physics of kinetic inductance, this work lays the foundation and demonstrates the potential for designing ultra-energy-efficient high-density passives for next-generation RFICs.

Finally, I evaluate the prospects of using 2D-materials for designing the cryogenic-interface electronics which can enable next-generation large-scale quantum computing. By performing extensive simulations, I reveal that the excellent structural and physical properties of these 2D-materials enable them to be utilized for cryogenic field-effect-transistors with ultra-low supply voltages, minimal device-to-device variation, and unprecedented improvements in energy-efficiency and performance, thereby paving the way for next-generation cryo-electronics and large-scale quantum computers.       

Therefore, by judiciously exploiting the various electrical, thermal, and physical properties of these 2D materials, significant improvements in performance and energy-efficiency beyond what is currently achievable can be realized, leading to a smarter life.


Kunjesh Agashiwala is a Ph. D. candidate and Graduate Student Researcher in the Nanoelectronics Research Laboratory (NRL), Department of Electrical and Computer Engineering at University of California, Santa Barbara, advised by Prof. Kaustav Banerjee. His doctoral research is focused on the exploration of 2D-materials enabled energy-efficient next-generation CMOS ICs and large-scale quantum computing. His doctoral research has been chronicled in over 9 publications including three first author publications in IEEE IEDM, the premier conference in the semiconductor devices and technology domain; two of which have been selected amongst the top student contributions.

Hosted by: Professor Kaustav Banerjee

Submitted by: Kunjesh Agashiwala <>