Oct 23 (Thu) @ 2:30pm: "Extreme Scale Ising Machines with Distributed p-computers," Navid Anjum Aadit, ECE PhD Defense

Location: Engineering Science Bldg (ESB), Room 2001
Zoom Meeting: https://ucsb.zoom.us/j/83212000725?pwd=5glf085KU3zrnJVjzsrDx8xMyGKJDw.1
Research Area: Computer Engineering, Electronics & Photonics
Research Keywords: Probabilistic Computing, Energy-Efficient Computing, Ising Machines, Combinatorial Optimization

Abstract

Probabilistic computing (p-computing) has emerged as a scalable and energy-efficient approach to building Ising machines for tackling intractable optimization problems, training energy-based machine learning models, and simulating complex quantum systems. Digital implementations of p-computers using field-programmable gate arrays (FPGAs) have demonstrated orders-of-magnitude improvements in speed and energy efficiency over other Ising machines. However, single-FPGA p-computers are limited by on-chip logic and memory resources. To overcome these limitations, a distributed architecture interconnecting multiple FPGAs is introduced. Large problem graphs with up to one million p-bits are partitioned using either professional or in-house probabilistic graph-partitioning tools, and the system can operate in globally asynchronous, locally synchronous (GALS) or fully synchronous modes, enabling a flexible trade-off between solution quality and execution speed.

Unlike cluster mean-field approximations, which do not perform exact Markov chain Monte Carlo (MCMC), the architecture implements near-exact MCMC sampling from the Boltzmann distribution. All FPGAs remain active concurrently, collectively performing graph-colored, massively parallel Gibbs sampling. On a prototype with 18 interconnected FPGAs and one million p-bits, per-spin update time near 1 picosecond is achieved, delivering significant wall-clock speedups over optimized central processing unit (CPU) and graphics processing unit (GPU) implementations. Scalability is demonstrated on canonical optimization benchmarks including 3D spin glass, 3-SAT, and Max-Cut, with support for a broad class of algorithms such as simulated annealing (SA), simulated quantum annealing (SQA), and parallel tempering (PT). The architecture’s asynchronous design is adaptable to custom application-specific integrated circuits (ASICs), stochastic magnetic tunnel junction (sMTJ) hardware, and other Ising-machine implementations, providing a practical path to extreme-scale probabilistic computing.

Bio

Navid Anjum Aadit is a Ph.D. candidate in Electrical and Computer Engineering at the University of California, Santa Barbara, advised by Professor Kerem Y. Camsari. His research focuses on probabilistic computing with p-bits and extreme-scale distributed architectures for Ising and Boltzmann machines on CMOS and FPGA platforms, emphasizing hardware-software co-design for scalable multi-chip systems.

Prior to his doctoral studies, he earned a Master of Science in Electrical Engineering from the University of California, Irvine (2020) and a Bachelor of Science in Electrical and Electronic Engineering from the Bangladesh University of Engineering and Technology (2016). His academic research has been complemented by internships at NASA (USRA) in 2023 and Siemens in 2025.

Navid received the Bell Labs Prize (3rd place) for probabilistic computing in 2023 and the Mahowald-Mead Prize for Neuromorphic Computing in 2025 with Professor Camsari and collaborators from the OPUS Lab. His work has appeared in venues such as Nature Electronics, Nature Communications, IEDM, VLSI Symposium and Physical Review Applied. He also received the UCSB Graduate Division Dissertation Fellowship in 2025.

Hosted By: ECE Professor Kerem Y. Camsari

Submitted By: Navid Anjum Aadit <maadit@ucsb.edu>