July 27 (Mon) @11:00am: "General purpose programming and OS principles for heterogeneous SoCs," Nazerke Turtayeva, ECE PhD Defense

Location: Henley Hall (HH), Lecture room 1010, Zoom Meeting: https://ucsb.zoom.us/j/5528501684
Research Area: Computer Engineering
Research Keywords: Computer Architectures, Accelerators, System-on-Chips, Programming Models

Abstract

There is a fundamental limit in how we architect System-on-Chips (SoCs) today. We lack the freedom to vary the accelerators we ship together to yield the best power and performance for a given SoC area. In practice, today’s SoCs carry mainly coarse-grained units that sit behind a driver, such as video codecs and neural engines that offload computation-heavy work. While some accelerators can operate well under this offload- only mode, many others whose work demands close and frequent interaction with software threads and with each other are second-class citizens, whether they serve applications, like encryption and hashing stages inside a data pipeline, or the system itself, like network processing, memory allocation, and garbage collection. Even for those that are built into SoCs, there is no uniform way to integrate them. Each effort today is ad hoc, with its own driver interface, programming model, and custom memory management. When accelerators were separate ASICs with their own memory and execution models, this loose peripheral attachment sufficed, but now that chiplets pack many special-purpose units into one package, it is a convention rather than a necessity. To change this status quo, in this dissertation we propose a new programming and system model that bridges the abstraction and responsibility cliff between accelerators and software threads.

In approaching this challenge, we follow a software-oriented acceleration philosophy. Instead of following hardware-driven, esoteric abstractions, accelerators should integrate into existing general-purpose programming frameworks, similar to software threads. In realizing this goal, we first built a programming model for accelerators that let them communicate as a Cohort of peers via shared memory queues. Then, we designed and built Blended OS, bringing accelerators into different parts of the runtime and operating system stack via a system graph abstraction. Finally, we designed and implemented FOMO, an event detection and distribution engine that gives accelerators executing in the background advanced OS capabilities.

We implemented all three systems in multiple SoC prototypes across the hardware and software stacks, where software-friendly, queue-based communication, a graph system structure, and event notifications are complemented by hardware substrates providing queue coherence, load-store operations, memory safety, and event subscription. Because these solutions are software-first, our systems integrate cleanly into existing software frameworks without demanding new ones, providing a strong foundation for the next generation of accelerated systems.

Bio

Nazerke Turtayeva is a PhD candidate in Electrical and Computer Engineering at UC Santa Barbara, advised by Prof. Jonathan Balkind. Her research centers on hardware-software co-design for heterogeneous SoCs, with a focus on composing custom accelerators efficiently and in a programmer-friendly manner. During her PhD, she has interned at Microsoft Research (Azure Systems and Confidential Computing), Google DeepMind, and the Barcelona Supercomputing Center. After her defense, she will join Efficient Computer startup as a Computer Architect.

Hosted By: CS Professor Jonathan Balkind

Submitted By: Nazerke Turtayeva <nturtayeva@ucsb.edu>