http://www.ece.ucsb.edu/courses/ECE122/122_F21Banerjee/ https://tinyurl.com/F21-ECE122A    Course Info |  Lecture Notes | Homework | Labs | Project | Resources   - ECE 122A - VLSI Principles    University of California, Santa Barbara, Fall Quarter 2021 - Instructor: Prof. Kaustav Banerjee    kaustav (at) ece.ucsb.edu    Office: Harold Frank Hall (HFH) 4151    Phone: (805) 893-3337    Fax: (805) 893-3262 - Teaching Assistant: Arnab Pal    arnab (at) ece.ucsb.edu    Office: HFH 2164 - Lecture Location:  ESB 1003 (Cooper Lab) - Lecture Time: Tue. & Thu. 3:30-4:45 PM - Lab Location: ENGR1 1140 (ECI Lab) - Lab Timings: Tue. 8:00-10:50 AM - Professor Office Hour Location: Room 4151, Harold Frank Hall - Professor Office Hour Time:  (Appointment by email) - TA Office Hour Location: HFH 2164 - TA Office Hour Time: Wednesday 3:30-4:30 PM - Midterm (2021) - Solutions - More course info Textbook CMOS VLSI DESIGN 4th Edition     - Lecture 01 (9/23/2021) - Introduction - Lecture 02 (9/28/2021) - History of transistors and ICs/Switch-level understanding of static CMOS circuits - Lecture 03 (9/30/2021) - Switch - Level Logic Circuits - Lecture 04 (10/05/2021) - IC Fabrication (Video) References:   G.E.Moore, "Cramming more components onto integrated circuits"   Intel, "From Sand to Circuit"   Intel, "From Sand to Silicon" Video 1 - Silicon Run 1 Video 2 - Silicon Run II - Lecture 05 (10/07/2021) - Review of Semiconductor Physics - Lecture 06 (10/12/2021) - P/N Junctions and MOS Structure - Lecture 07 (10/14/2021) - MOSFET Physics and Operation - Lecture 08 (10/19/2021) - Dynamic Behavior of MOSFET and CMOS Inverter - Lecture 09 (10/26/2021) - Inverter - Lecture 10 (10/28/2021) - Inverter Sizing and Logical Effort - Lecture 11 (11/09/2021) - Datapath (Adder) - Lecture 12 (11/16/2021) - Combinational Logic Circuit - Lecture 13 (11/18/2021) - Interconnects - Lecture 14 (11/23/2021) - Ratioed, Pass Transistor and Dynamic Logic - Lecture 15 (11/30/2021) - Sequential Logic - Lecture 16 (12/02/2021) - Semiconductor Memories - Homework 1 (Due on Monday, 10/04/2021, 5:00 PM) - Review of Digital Design Solution - Homework 2 (Due on Wednesday, 10/13/2021, 11:59 PM) - CMOS and Pass Transistors Solution - Homework 3 (Due on Wednesday, 10/20/2021, 11:59 PM) - IC Fabrication, P/N Junctions and MOSCAP Solutions - Homework 4 (Due on Friday, 10/29/2021, 11:59 PM) - MOSFET and CMOS Inverter Solutions - Homework 5 (Due on Monday, 11/08/2021, 11:59 PM) - Device Parasitics, CMOS Inverter and Logic Gate Sizing Solutions - Homework 6 (Due on Sunday, 12/05/2021, 09:00 PM) - Interconnect, Dynamic Logic, Ratioed and Pass Transistor Logic, Semiconductor Memories Solutions - Do NOT - Do not copy from each other! - Mail the homeworks to arnab@ucsb.edu - Lab 1 (Due on Wednesday, 10/06/2021, 5:00 PM) - Environment setup and tool practice    Additional files for Lab 1    180nm_bulk.txt    bash_configure    inv.sp - Lab 2 (Due on Friday, 10/15/2021, 5:00 PM) - CMOS Circuit Simulation with HSPICE - Lab 3 (Due on Friday, 10/29/2021, 5:00 PM) - Single stage CMOS logic gate layout - Lab 4 (Due on Friday, 11/12/2021, 11:59 PM) - Inverter, CMOS Sizing and Delay - You will need to use these software: (Manuals provided) - HSpice (Circuit Netlist Simulation) - HSpice Manual - CosmosScope/AvanWaves    (Waveform viewer for Linux/Windows) - MMI MAX - MMI SUE - CScope Manual - AvanWaves Manual - MAX Tutorial - SUE Tutorial  Project Reference: LVS Technology for the Intel(R) Pentium(R) 4 Processor on 90nm Technology - Final Project - PART 0 - Work individually or in a group of two Please signup on this Group List - PART 1 Review on LVS Technology (Complete by Thursday 11/18/2021 11:59 PM) - PART 2 Complete DCN and CDL cells (Complete by Tuesday 11/23/2021 11:59 PM) - PART 3 Complete Sense Amplifier Design (Complete by Sunday 11/28/2021 11:59 PM) - PART 4 Final Project Due (Complete by Sunday 12/05/2021 11:59 PM) - An Introduction to GNU/Linux Command Shell:   http://vic.gedris.org/Manual-ShellIntro/1.2/ShellIntro.pdf - For a better understanding of device physics, please refer to the supplementary textbook:    Modern Semiconductor Devices for ICs (1st Edition), by Chenming Hu

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